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f5b8794e17
The dma-buf import code currently attaches and maps all imported dma-bufs to the drm device to get their sgt for mapping to the directly managed IOMMU domain. In many cases, like for newer chips (Tegra186+), the directly managed IOMMU domain is, however, not used. Mapping to the drm device can also cause issues e.g. with swiotlb since it is not a real device. To improve the situation, only attach and map imported dma-bufs when required. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240424051335.2872574-2-cyndis@kapsi.fi
106 lines
3 KiB
C
106 lines
3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Tegra host1x GEM implementation
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*
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* Copyright (c) 2012-2013, NVIDIA Corporation.
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*/
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#ifndef __HOST1X_GEM_H
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#define __HOST1X_GEM_H
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#include <linux/host1x.h>
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#include <drm/drm.h>
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#include <drm/drm_gem.h>
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#define TEGRA_BO_BOTTOM_UP (1 << 0)
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enum tegra_bo_tiling_mode {
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TEGRA_BO_TILING_MODE_PITCH,
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TEGRA_BO_TILING_MODE_TILED,
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TEGRA_BO_TILING_MODE_BLOCK,
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};
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enum tegra_bo_sector_layout {
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TEGRA_BO_SECTOR_LAYOUT_TEGRA,
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TEGRA_BO_SECTOR_LAYOUT_GPU,
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};
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struct tegra_bo_tiling {
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enum tegra_bo_tiling_mode mode;
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unsigned long value;
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enum tegra_bo_sector_layout sector_layout;
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};
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/*
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* How memory is referenced within a tegra_bo:
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*
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* Buffer source | Mapping API(*) | Fields
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* ---------------+-----------------+---------------
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* Allocated here | DMA API | iova (IOVA mapped to drm->dev), vaddr (CPU VA)
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*
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* Allocated here | IOMMU API | pages/num_pages (Phys. memory), sgt (Mapped to drm->dev),
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* | iova/size (Mapped to domain)
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*
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* Imported | DMA API | dma_buf (Imported dma_buf)
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*
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* Imported | IOMMU API | dma_buf (Imported dma_buf),
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* | gem->import_attach (Attachment on drm->dev),
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* | sgt (Mapped to drm->dev)
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* | iova/size (Mapped to domain)
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*
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* (*) If tegra->domain is set, i.e. TegraDRM IOMMU domain is directly managed through IOMMU API,
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* this is IOMMU API. Otherwise DMA API.
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*/
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struct tegra_bo {
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struct drm_gem_object gem;
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struct host1x_bo base;
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unsigned long flags;
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struct sg_table *sgt;
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dma_addr_t iova;
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void *vaddr;
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struct dma_buf *dma_buf;
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struct drm_mm_node *mm;
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unsigned long num_pages;
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struct page **pages;
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/* size of IOMMU mapping */
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size_t size;
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struct tegra_bo_tiling tiling;
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};
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static inline struct tegra_bo *to_tegra_bo(struct drm_gem_object *gem)
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{
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return container_of(gem, struct tegra_bo, gem);
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}
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static inline struct tegra_bo *host1x_to_tegra_bo(struct host1x_bo *bo)
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{
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return container_of(bo, struct tegra_bo, base);
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}
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struct tegra_bo *tegra_bo_create(struct drm_device *drm, size_t size,
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unsigned long flags);
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struct tegra_bo *tegra_bo_create_with_handle(struct drm_file *file,
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struct drm_device *drm,
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size_t size,
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unsigned long flags,
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u32 *handle);
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void tegra_bo_free_object(struct drm_gem_object *gem);
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int tegra_bo_dumb_create(struct drm_file *file, struct drm_device *drm,
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struct drm_mode_create_dumb *args);
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extern const struct vm_operations_struct tegra_bo_vm_ops;
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int __tegra_gem_mmap(struct drm_gem_object *gem, struct vm_area_struct *vma);
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int tegra_drm_mmap(struct file *file, struct vm_area_struct *vma);
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struct dma_buf *tegra_gem_prime_export(struct drm_gem_object *gem,
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int flags);
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struct drm_gem_object *tegra_gem_prime_import(struct drm_device *drm,
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struct dma_buf *buf);
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struct host1x_bo *tegra_gem_lookup(struct drm_file *file, u32 handle);
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#endif
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