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5012bd2dc6
Drop 'inline' from all the *_mod_init_arch() functions so that the compiler will warn about any bugs where they are unused due to not being wired up properly. (There are no such bugs currently, so this just establishes a more robust convention for the future. Of course, these functions also tend to get inlined anyway, regardless of the keyword.) Link: https://lore.kernel.org/r/20250816020457.432040-1-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@kernel.org>
43 lines
1.2 KiB
C
43 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* SHA-256 accelerated using the sparc64 sha256 opcodes
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*
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* Copyright (c) Jean-Luc Cooke <jlcooke@certainkey.com>
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* Copyright (c) Andrew McDonald <andrew@mcdonald.org.uk>
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* Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
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* SHA224 Support Copyright 2007 Intel Corporation <jonathan.lynch@intel.com>
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*/
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#include <asm/elf.h>
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#include <asm/opcodes.h>
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#include <asm/pstate.h>
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static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_sha256_opcodes);
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asmlinkage void sha256_sparc64_transform(struct sha256_block_state *state,
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const u8 *data, size_t nblocks);
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static void sha256_blocks(struct sha256_block_state *state,
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const u8 *data, size_t nblocks)
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{
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if (static_branch_likely(&have_sha256_opcodes))
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sha256_sparc64_transform(state, data, nblocks);
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else
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sha256_blocks_generic(state, data, nblocks);
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}
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#define sha256_mod_init_arch sha256_mod_init_arch
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static void sha256_mod_init_arch(void)
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{
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unsigned long cfr;
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if (!(sparc64_elf_hwcap & HWCAP_SPARC_CRYPTO))
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return;
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__asm__ __volatile__("rd %%asr26, %0" : "=r" (cfr));
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if (!(cfr & CFR_SHA256))
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return;
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static_branch_enable(&have_sha256_opcodes);
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pr_info("Using sparc64 sha256 opcode optimized SHA-256/SHA-224 implementation\n");
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}
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