Aric Cyr 01130f5260 drm/amd/display: Add hubp cache reset when powergating ... [Why] When HUBP is power gated, the SW state can get out of sync with the hardware state causing cursor to not be programmed correctly. [How] Similar to DPP, add a HUBP reset function which is called wherever HUBP is initialized or powergated. This function will clear the cursor position and attribute cache allowing for proper programming when the HUBP is brought back up. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Reviewed-by: Sung Lee <sung.lee@amd.com> Signed-off-by: Aric Cyr <Aric.Cyr@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2025-01-24 09:56:22 -05:00
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abm.h
audio.h
aux_engine.h
clk_mgr.h	drm/amd/display: Log Hard Min Clocks and Phantom Pipe Status	2025-01-10 11:59:27 -05:00
clk_mgr_internal.h	drm/amd/display: update dcn351 used clock offset	2024-12-10 10:37:16 -05:00
cursor_reg_cache.h
dccg.h
dchubbub.h
dmcu.h
dpp.h
dwb.h
gpio.h
hubp.h	drm/amd/display: Add hubp cache reset when powergating	2025-01-24 09:56:22 -05:00
hw_shared.h
ipp.h
link_encoder.h	drm/amd/display: have pretrain for dpia	2025-01-06 14:44:27 -05:00
mcif_wb.h
mem_input.h	drm/amd/display: Update dc_tiling_info union to structure	2025-01-06 14:44:27 -05:00
mpc.h
opp.h
optc.h	drm/amd/display: Extend dc_stream_get_crc to support 2nd crc engine	2025-01-06 14:44:26 -05:00
panel_cntl.h
pg_cntl.h
stream_encoder.h
timing_generator.h	drm/amd/display: Add support to configure CRC window on specific CRC instance	2025-01-10 12:03:45 -05:00
transform.h
vmid.h
vpg.h