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541cd55557
New cmd table for ELM/BAF for setting the dispclock or dprefclock. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
60 lines
2.6 KiB
C
60 lines
2.6 KiB
C
/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef __ATOMBIOS_CRTC_H__
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#define __ATOMBIOS_CRTC_H__
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void amdgpu_atombios_crtc_overscan_setup(struct drm_crtc *crtc,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode);
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void amdgpu_atombios_crtc_scaler_setup(struct drm_crtc *crtc);
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void amdgpu_atombios_crtc_lock(struct drm_crtc *crtc, int lock);
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void amdgpu_atombios_crtc_enable(struct drm_crtc *crtc, int state);
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void amdgpu_atombios_crtc_blank(struct drm_crtc *crtc, int state);
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void amdgpu_atombios_crtc_powergate(struct drm_crtc *crtc, int state);
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void amdgpu_atombios_crtc_powergate_init(struct amdgpu_device *adev);
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void amdgpu_atombios_crtc_set_dtd_timing(struct drm_crtc *crtc,
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struct drm_display_mode *mode);
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void amdgpu_atombios_crtc_set_disp_eng_pll(struct amdgpu_device *adev,
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u32 dispclk);
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u32 amdgpu_atombios_crtc_set_dce_clock(struct amdgpu_device *adev,
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u32 freq, u8 clk_type, u8 clk_src);
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void amdgpu_atombios_crtc_program_pll(struct drm_crtc *crtc,
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u32 crtc_id,
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int pll_id,
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u32 encoder_mode,
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u32 encoder_id,
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u32 clock,
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u32 ref_div,
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u32 fb_div,
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u32 frac_fb_div,
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u32 post_div,
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int bpc,
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bool ss_enabled,
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struct amdgpu_atom_ss *ss);
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int amdgpu_atombios_crtc_prepare_pll(struct drm_crtc *crtc,
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struct drm_display_mode *mode);
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void amdgpu_atombios_crtc_set_pll(struct drm_crtc *crtc,
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struct drm_display_mode *mode);
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#endif
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