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	The raid6 syndrome functions are generated for different sizes and have no generic prototype, while in the inner functions have a prototype in a header that cannot be included from the correct file. In both cases, the compiler warns about missing prototypes: lib/raid6/recov_neon_inner.c:27:6: warning: no previous prototype for '__raid6_2data_recov_neon' [-Wmissing-prototypes] lib/raid6/recov_neon_inner.c:77:6: warning: no previous prototype for '__raid6_datap_recov_neon' [-Wmissing-prototypes] lib/raid6/neon1.c:56:6: warning: no previous prototype for 'raid6_neon1_gen_syndrome_real' [-Wmissing-prototypes] lib/raid6/neon1.c:86:6: warning: no previous prototype for 'raid6_neon1_xor_syndrome_real' [-Wmissing-prototypes] lib/raid6/neon2.c:56:6: warning: no previous prototype for 'raid6_neon2_gen_syndrome_real' [-Wmissing-prototypes] lib/raid6/neon2.c:97:6: warning: no previous prototype for 'raid6_neon2_xor_syndrome_real' [-Wmissing-prototypes] lib/raid6/neon4.c:56:6: warning: no previous prototype for 'raid6_neon4_gen_syndrome_real' [-Wmissing-prototypes] lib/raid6/neon4.c:119:6: warning: no previous prototype for 'raid6_neon4_xor_syndrome_real' [-Wmissing-prototypes] lib/raid6/neon8.c:56:6: warning: no previous prototype for 'raid6_neon8_gen_syndrome_real' [-Wmissing-prototypes] lib/raid6/neon8.c:163:6: warning: no previous prototype for 'raid6_neon8_xor_syndrome_real' [-Wmissing-prototypes] Add a new header file that contains the prototypes for both to avoid the warnings. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Song Liu <song@kernel.org> Link: https://lore.kernel.org/r/20230517132220.937200-1-arnd@kernel.org
		
			
				
	
	
		
			111 lines
		
	
	
	
		
			2.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			111 lines
		
	
	
	
		
			2.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
// SPDX-License-Identifier: GPL-2.0-only
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/*
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 * Copyright (C) 2012 Intel Corporation
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 * Copyright (C) 2017 Linaro Ltd. <ard.biesheuvel@linaro.org>
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 */
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#include <arm_neon.h>
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#include "neon.h"
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#ifdef CONFIG_ARM
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/*
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 * AArch32 does not provide this intrinsic natively because it does not
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 * implement the underlying instruction. AArch32 only provides a 64-bit
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 * wide vtbl.8 instruction, so use that instead.
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 */
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static uint8x16_t vqtbl1q_u8(uint8x16_t a, uint8x16_t b)
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{
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	union {
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		uint8x16_t	val;
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		uint8x8x2_t	pair;
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	} __a = { a };
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	return vcombine_u8(vtbl2_u8(__a.pair, vget_low_u8(b)),
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			   vtbl2_u8(__a.pair, vget_high_u8(b)));
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}
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#endif
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void __raid6_2data_recov_neon(int bytes, uint8_t *p, uint8_t *q, uint8_t *dp,
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			      uint8_t *dq, const uint8_t *pbmul,
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			      const uint8_t *qmul)
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{
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	uint8x16_t pm0 = vld1q_u8(pbmul);
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	uint8x16_t pm1 = vld1q_u8(pbmul + 16);
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	uint8x16_t qm0 = vld1q_u8(qmul);
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	uint8x16_t qm1 = vld1q_u8(qmul + 16);
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	uint8x16_t x0f = vdupq_n_u8(0x0f);
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	/*
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	 * while ( bytes-- ) {
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	 *	uint8_t px, qx, db;
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	 *
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	 *	px    = *p ^ *dp;
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	 *	qx    = qmul[*q ^ *dq];
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	 *	*dq++ = db = pbmul[px] ^ qx;
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	 *	*dp++ = db ^ px;
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	 *	p++; q++;
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	 * }
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	 */
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	while (bytes) {
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		uint8x16_t vx, vy, px, qx, db;
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		px = veorq_u8(vld1q_u8(p), vld1q_u8(dp));
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		vx = veorq_u8(vld1q_u8(q), vld1q_u8(dq));
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		vy = vshrq_n_u8(vx, 4);
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		vx = vqtbl1q_u8(qm0, vandq_u8(vx, x0f));
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		vy = vqtbl1q_u8(qm1, vy);
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		qx = veorq_u8(vx, vy);
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		vy = vshrq_n_u8(px, 4);
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		vx = vqtbl1q_u8(pm0, vandq_u8(px, x0f));
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		vy = vqtbl1q_u8(pm1, vy);
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		vx = veorq_u8(vx, vy);
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		db = veorq_u8(vx, qx);
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		vst1q_u8(dq, db);
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		vst1q_u8(dp, veorq_u8(db, px));
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		bytes -= 16;
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		p += 16;
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		q += 16;
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		dp += 16;
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		dq += 16;
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	}
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}
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void __raid6_datap_recov_neon(int bytes, uint8_t *p, uint8_t *q, uint8_t *dq,
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			      const uint8_t *qmul)
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{
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	uint8x16_t qm0 = vld1q_u8(qmul);
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	uint8x16_t qm1 = vld1q_u8(qmul + 16);
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	uint8x16_t x0f = vdupq_n_u8(0x0f);
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	/*
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	 * while (bytes--) {
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	 *	*p++ ^= *dq = qmul[*q ^ *dq];
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	 *	q++; dq++;
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	 * }
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	 */
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	while (bytes) {
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		uint8x16_t vx, vy;
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		vx = veorq_u8(vld1q_u8(q), vld1q_u8(dq));
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		vy = vshrq_n_u8(vx, 4);
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		vx = vqtbl1q_u8(qm0, vandq_u8(vx, x0f));
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		vy = vqtbl1q_u8(qm1, vy);
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		vx = veorq_u8(vx, vy);
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		vy = veorq_u8(vx, vld1q_u8(p));
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		vst1q_u8(dq, vx);
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		vst1q_u8(p, vy);
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		bytes -= 16;
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		p += 16;
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		q += 16;
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		dq += 16;
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	}
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}
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