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HDCP driver needs to check if secure environment supports HDCP. If it's supported, then it requires to program some registers through SCM. Add qcom_scm_hdcp_available and qcom_scm_hdcp_req to support these requirements. Signed-off-by: Jilai Wang <jilaiw@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
96 lines
3 KiB
C
96 lines
3 KiB
C
/* Copyright (c) 2010,2015, The Linux Foundation. All rights reserved.
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* Copyright (C) 2015 Linaro Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*/
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#include <linux/cpumask.h>
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#include <linux/export.h>
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#include <linux/types.h>
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#include <linux/qcom_scm.h>
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#include "qcom_scm.h"
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/**
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* qcom_scm_set_cold_boot_addr() - Set the cold boot address for cpus
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* @entry: Entry point function for the cpus
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* @cpus: The cpumask of cpus that will use the entry point
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*
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* Set the cold boot address of the cpus. Any cpu outside the supported
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* range would be removed from the cpu present mask.
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*/
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int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
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{
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return __qcom_scm_set_cold_boot_addr(entry, cpus);
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}
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EXPORT_SYMBOL(qcom_scm_set_cold_boot_addr);
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/**
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* qcom_scm_set_warm_boot_addr() - Set the warm boot address for cpus
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* @entry: Entry point function for the cpus
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* @cpus: The cpumask of cpus that will use the entry point
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*
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* Set the Linux entry point for the SCM to transfer control to when coming
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* out of a power down. CPU power down may be executed on cpuidle or hotplug.
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*/
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int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
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{
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return __qcom_scm_set_warm_boot_addr(entry, cpus);
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}
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EXPORT_SYMBOL(qcom_scm_set_warm_boot_addr);
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/**
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* qcom_scm_cpu_power_down() - Power down the cpu
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* @flags - Flags to flush cache
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*
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* This is an end point to power down cpu. If there was a pending interrupt,
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* the control would return from this function, otherwise, the cpu jumps to the
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* warm boot entry point set for this cpu upon reset.
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*/
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void qcom_scm_cpu_power_down(u32 flags)
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{
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__qcom_scm_cpu_power_down(flags);
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}
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EXPORT_SYMBOL(qcom_scm_cpu_power_down);
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/**
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* qcom_scm_hdcp_available() - Check if secure environment supports HDCP.
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*
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* Return true if HDCP is supported, false if not.
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*/
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bool qcom_scm_hdcp_available(void)
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{
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int ret;
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ret = __qcom_scm_is_call_available(QCOM_SCM_SVC_HDCP,
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QCOM_SCM_CMD_HDCP);
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return (ret > 0) ? true : false;
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}
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EXPORT_SYMBOL(qcom_scm_hdcp_available);
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/**
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* qcom_scm_hdcp_req() - Send HDCP request.
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* @req: HDCP request array
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* @req_cnt: HDCP request array count
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* @resp: response buffer passed to SCM
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*
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* Write HDCP register(s) through SCM.
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*/
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int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp)
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{
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return __qcom_scm_hdcp_req(req, req_cnt, resp);
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}
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EXPORT_SYMBOL(qcom_scm_hdcp_req);
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