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	rtc_register_device() is a managed interface but it doesn't use devres by itself - instead it marks an rtc_device as "registered" and the devres callback for devm_rtc_allocate_device() takes care of resource release. This doesn't correspond with the design behind devres where managed structures should not be aware of being managed. The correct solution here is to register a separate devres callback for unregistering the device. While at it: rename rtc_register_device() to devm_rtc_register_device() and add it to the list of managed interfaces in devres.rst. This way we can avoid any potential confusion of driver developers who may expect there to exist a corresponding unregister function. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20201109163409.24301-8-brgl@bgdev.pl
		
			
				
	
	
		
			413 lines
		
	
	
	
		
			11 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			413 lines
		
	
	
	
		
			11 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
// SPDX-License-Identifier: GPL-2.0
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/*
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 * Copyright (c) 2019 MediaTek Inc.
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 * Author: Ran Bi <ran.bi@mediatek.com>
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 */
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/irqdomain.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/platform_device.h>
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#include <linux/rtc.h>
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#define MT2712_BBPU		0x0000
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#define MT2712_BBPU_CLRPKY	BIT(4)
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#define MT2712_BBPU_RELOAD	BIT(5)
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#define MT2712_BBPU_CBUSY	BIT(6)
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#define MT2712_BBPU_KEY		(0x43 << 8)
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#define MT2712_IRQ_STA		0x0004
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#define MT2712_IRQ_STA_AL	BIT(0)
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#define MT2712_IRQ_STA_TC	BIT(1)
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#define MT2712_IRQ_EN		0x0008
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#define MT2712_IRQ_EN_AL	BIT(0)
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#define MT2712_IRQ_EN_TC	BIT(1)
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#define MT2712_IRQ_EN_ONESHOT	BIT(2)
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#define MT2712_CII_EN		0x000c
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#define MT2712_AL_MASK		0x0010
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#define MT2712_AL_MASK_DOW	BIT(4)
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#define MT2712_TC_SEC		0x0014
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#define MT2712_TC_MIN		0x0018
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#define MT2712_TC_HOU		0x001c
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#define MT2712_TC_DOM		0x0020
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#define MT2712_TC_DOW		0x0024
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#define MT2712_TC_MTH		0x0028
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#define MT2712_TC_YEA		0x002c
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#define MT2712_AL_SEC		0x0030
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#define MT2712_AL_MIN		0x0034
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#define MT2712_AL_HOU		0x0038
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#define MT2712_AL_DOM		0x003c
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#define MT2712_AL_DOW		0x0040
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#define MT2712_AL_MTH		0x0044
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#define MT2712_AL_YEA		0x0048
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#define MT2712_SEC_MASK		0x003f
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#define MT2712_MIN_MASK		0x003f
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#define MT2712_HOU_MASK		0x001f
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#define MT2712_DOM_MASK		0x001f
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#define MT2712_DOW_MASK		0x0007
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#define MT2712_MTH_MASK		0x000f
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#define MT2712_YEA_MASK		0x007f
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#define MT2712_POWERKEY1	0x004c
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#define MT2712_POWERKEY2	0x0050
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#define MT2712_POWERKEY1_KEY	0xa357
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#define MT2712_POWERKEY2_KEY	0x67d2
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#define MT2712_CON0		0x005c
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#define MT2712_CON1		0x0060
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#define MT2712_PROT		0x0070
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#define MT2712_PROT_UNLOCK1	0x9136
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#define MT2712_PROT_UNLOCK2	0x586a
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#define MT2712_WRTGR		0x0078
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#define MT2712_RTC_TIMESTAMP_END_2127	4985971199LL
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struct mt2712_rtc {
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	struct rtc_device	*rtc;
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	void __iomem		*base;
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	int			irq;
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	u8			irq_wake_enabled;
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	u8			powerlost;
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};
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static inline u32 mt2712_readl(struct mt2712_rtc *mt2712_rtc, u32 reg)
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{
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	return readl(mt2712_rtc->base + reg);
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}
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static inline void mt2712_writel(struct mt2712_rtc *mt2712_rtc,
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				 u32 reg, u32 val)
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{
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	writel(val, mt2712_rtc->base + reg);
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}
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static void mt2712_rtc_write_trigger(struct mt2712_rtc *mt2712_rtc)
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{
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	unsigned long timeout = jiffies + HZ / 10;
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	mt2712_writel(mt2712_rtc, MT2712_WRTGR, 1);
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	while (1) {
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		if (!(mt2712_readl(mt2712_rtc, MT2712_BBPU)
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					& MT2712_BBPU_CBUSY))
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			break;
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		if (time_after(jiffies, timeout)) {
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			dev_err(&mt2712_rtc->rtc->dev,
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				"%s time out!\n", __func__);
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			break;
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		}
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		cpu_relax();
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	}
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}
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static void mt2712_rtc_writeif_unlock(struct mt2712_rtc *mt2712_rtc)
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{
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	mt2712_writel(mt2712_rtc, MT2712_PROT, MT2712_PROT_UNLOCK1);
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	mt2712_rtc_write_trigger(mt2712_rtc);
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	mt2712_writel(mt2712_rtc, MT2712_PROT, MT2712_PROT_UNLOCK2);
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	mt2712_rtc_write_trigger(mt2712_rtc);
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}
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static irqreturn_t rtc_irq_handler_thread(int irq, void *data)
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{
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	struct mt2712_rtc *mt2712_rtc = data;
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	u16 irqsta;
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	/* Clear interrupt */
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	irqsta = mt2712_readl(mt2712_rtc, MT2712_IRQ_STA);
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	if (irqsta & MT2712_IRQ_STA_AL) {
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		rtc_update_irq(mt2712_rtc->rtc, 1, RTC_IRQF | RTC_AF);
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		return IRQ_HANDLED;
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	}
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	return IRQ_NONE;
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}
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static void __mt2712_rtc_read_time(struct mt2712_rtc *mt2712_rtc,
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				   struct rtc_time *tm, int *sec)
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{
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	tm->tm_sec  = mt2712_readl(mt2712_rtc, MT2712_TC_SEC)
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			& MT2712_SEC_MASK;
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	tm->tm_min  = mt2712_readl(mt2712_rtc, MT2712_TC_MIN)
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			& MT2712_MIN_MASK;
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	tm->tm_hour = mt2712_readl(mt2712_rtc, MT2712_TC_HOU)
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			& MT2712_HOU_MASK;
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	tm->tm_mday = mt2712_readl(mt2712_rtc, MT2712_TC_DOM)
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			& MT2712_DOM_MASK;
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	tm->tm_mon  = (mt2712_readl(mt2712_rtc, MT2712_TC_MTH) - 1)
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			& MT2712_MTH_MASK;
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	tm->tm_year = (mt2712_readl(mt2712_rtc, MT2712_TC_YEA) + 100)
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			& MT2712_YEA_MASK;
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	*sec = mt2712_readl(mt2712_rtc, MT2712_TC_SEC) & MT2712_SEC_MASK;
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}
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static int mt2712_rtc_read_time(struct device *dev, struct rtc_time *tm)
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{
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	struct mt2712_rtc *mt2712_rtc = dev_get_drvdata(dev);
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	int sec;
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	if (mt2712_rtc->powerlost)
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		return -EINVAL;
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	do {
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		__mt2712_rtc_read_time(mt2712_rtc, tm, &sec);
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	} while (sec < tm->tm_sec);	/* SEC has carried */
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	return 0;
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}
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static int mt2712_rtc_set_time(struct device *dev, struct rtc_time *tm)
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{
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	struct mt2712_rtc *mt2712_rtc = dev_get_drvdata(dev);
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	mt2712_writel(mt2712_rtc, MT2712_TC_SEC, tm->tm_sec  & MT2712_SEC_MASK);
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	mt2712_writel(mt2712_rtc, MT2712_TC_MIN, tm->tm_min  & MT2712_MIN_MASK);
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	mt2712_writel(mt2712_rtc, MT2712_TC_HOU, tm->tm_hour & MT2712_HOU_MASK);
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	mt2712_writel(mt2712_rtc, MT2712_TC_DOM, tm->tm_mday & MT2712_DOM_MASK);
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	mt2712_writel(mt2712_rtc, MT2712_TC_MTH,
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		      (tm->tm_mon + 1) & MT2712_MTH_MASK);
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	mt2712_writel(mt2712_rtc, MT2712_TC_YEA,
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		      (tm->tm_year - 100) & MT2712_YEA_MASK);
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	mt2712_rtc_write_trigger(mt2712_rtc);
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	if (mt2712_rtc->powerlost)
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		mt2712_rtc->powerlost = false;
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	return 0;
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}
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static int mt2712_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
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{
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	struct mt2712_rtc *mt2712_rtc = dev_get_drvdata(dev);
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	struct rtc_time *tm = &alm->time;
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	u16 irqen;
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	irqen = mt2712_readl(mt2712_rtc, MT2712_IRQ_EN);
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	alm->enabled = !!(irqen & MT2712_IRQ_EN_AL);
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	tm->tm_sec  = mt2712_readl(mt2712_rtc, MT2712_AL_SEC) & MT2712_SEC_MASK;
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	tm->tm_min  = mt2712_readl(mt2712_rtc, MT2712_AL_MIN) & MT2712_MIN_MASK;
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	tm->tm_hour = mt2712_readl(mt2712_rtc, MT2712_AL_HOU) & MT2712_HOU_MASK;
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	tm->tm_mday = mt2712_readl(mt2712_rtc, MT2712_AL_DOM) & MT2712_DOM_MASK;
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	tm->tm_mon  = (mt2712_readl(mt2712_rtc, MT2712_AL_MTH) - 1)
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		      & MT2712_MTH_MASK;
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	tm->tm_year = (mt2712_readl(mt2712_rtc, MT2712_AL_YEA) + 100)
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		      & MT2712_YEA_MASK;
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	return 0;
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}
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static int mt2712_rtc_alarm_irq_enable(struct device *dev,
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				       unsigned int enabled)
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{
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	struct mt2712_rtc *mt2712_rtc = dev_get_drvdata(dev);
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	u16 irqen;
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	irqen = mt2712_readl(mt2712_rtc, MT2712_IRQ_EN);
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	if (enabled)
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		irqen |= MT2712_IRQ_EN_AL;
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	else
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		irqen &= ~MT2712_IRQ_EN_AL;
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	mt2712_writel(mt2712_rtc, MT2712_IRQ_EN, irqen);
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	mt2712_rtc_write_trigger(mt2712_rtc);
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	return 0;
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}
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static int mt2712_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
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{
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	struct mt2712_rtc *mt2712_rtc = dev_get_drvdata(dev);
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	struct rtc_time *tm = &alm->time;
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	dev_dbg(&mt2712_rtc->rtc->dev, "set al time: %ptR, alm en: %d\n",
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		tm, alm->enabled);
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	mt2712_writel(mt2712_rtc, MT2712_AL_SEC,
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		      (mt2712_readl(mt2712_rtc, MT2712_AL_SEC)
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		       & ~(MT2712_SEC_MASK)) | (tm->tm_sec  & MT2712_SEC_MASK));
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	mt2712_writel(mt2712_rtc, MT2712_AL_MIN,
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		      (mt2712_readl(mt2712_rtc, MT2712_AL_MIN)
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		       & ~(MT2712_MIN_MASK)) | (tm->tm_min  & MT2712_MIN_MASK));
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	mt2712_writel(mt2712_rtc, MT2712_AL_HOU,
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		      (mt2712_readl(mt2712_rtc, MT2712_AL_HOU)
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		       & ~(MT2712_HOU_MASK)) | (tm->tm_hour & MT2712_HOU_MASK));
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	mt2712_writel(mt2712_rtc, MT2712_AL_DOM,
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		      (mt2712_readl(mt2712_rtc, MT2712_AL_DOM)
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		       & ~(MT2712_DOM_MASK)) | (tm->tm_mday & MT2712_DOM_MASK));
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	mt2712_writel(mt2712_rtc, MT2712_AL_MTH,
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		      (mt2712_readl(mt2712_rtc, MT2712_AL_MTH)
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		       & ~(MT2712_MTH_MASK))
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		      | ((tm->tm_mon + 1) & MT2712_MTH_MASK));
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	mt2712_writel(mt2712_rtc, MT2712_AL_YEA,
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		      (mt2712_readl(mt2712_rtc, MT2712_AL_YEA)
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		       & ~(MT2712_YEA_MASK))
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		      | ((tm->tm_year - 100) & MT2712_YEA_MASK));
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	/* mask day of week */
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	mt2712_writel(mt2712_rtc, MT2712_AL_MASK, MT2712_AL_MASK_DOW);
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	mt2712_rtc_write_trigger(mt2712_rtc);
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	mt2712_rtc_alarm_irq_enable(dev, alm->enabled);
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	return 0;
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}
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/* Init RTC register */
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static void mt2712_rtc_hw_init(struct mt2712_rtc *mt2712_rtc)
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{
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	u32 p1, p2;
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	mt2712_writel(mt2712_rtc, MT2712_BBPU,
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		      MT2712_BBPU_KEY | MT2712_BBPU_RELOAD);
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	mt2712_writel(mt2712_rtc, MT2712_CII_EN, 0);
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	mt2712_writel(mt2712_rtc, MT2712_AL_MASK, 0);
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	/* necessary before set MT2712_POWERKEY */
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	mt2712_writel(mt2712_rtc, MT2712_CON0, 0x4848);
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	mt2712_writel(mt2712_rtc, MT2712_CON1, 0x0048);
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	mt2712_rtc_write_trigger(mt2712_rtc);
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	p1 = mt2712_readl(mt2712_rtc, MT2712_POWERKEY1);
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	p2 = mt2712_readl(mt2712_rtc, MT2712_POWERKEY2);
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	if (p1 != MT2712_POWERKEY1_KEY || p2 != MT2712_POWERKEY2_KEY) {
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		mt2712_rtc->powerlost = true;
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		dev_dbg(&mt2712_rtc->rtc->dev,
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			"powerkey not set (lost power)\n");
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	} else {
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		mt2712_rtc->powerlost = false;
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	}
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	/* RTC need POWERKEY1/2 match, then goto normal work mode */
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	mt2712_writel(mt2712_rtc, MT2712_POWERKEY1, MT2712_POWERKEY1_KEY);
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	mt2712_writel(mt2712_rtc, MT2712_POWERKEY2, MT2712_POWERKEY2_KEY);
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	mt2712_rtc_write_trigger(mt2712_rtc);
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	mt2712_rtc_writeif_unlock(mt2712_rtc);
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}
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static const struct rtc_class_ops mt2712_rtc_ops = {
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	.read_time	= mt2712_rtc_read_time,
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	.set_time	= mt2712_rtc_set_time,
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	.read_alarm	= mt2712_rtc_read_alarm,
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	.set_alarm	= mt2712_rtc_set_alarm,
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	.alarm_irq_enable = mt2712_rtc_alarm_irq_enable,
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};
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static int mt2712_rtc_probe(struct platform_device *pdev)
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{
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	struct mt2712_rtc *mt2712_rtc;
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	int ret;
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	mt2712_rtc = devm_kzalloc(&pdev->dev,
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				  sizeof(struct mt2712_rtc), GFP_KERNEL);
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	if (!mt2712_rtc)
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		return -ENOMEM;
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	mt2712_rtc->base = devm_platform_ioremap_resource(pdev, 0);
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	if (IS_ERR(mt2712_rtc->base))
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		return PTR_ERR(mt2712_rtc->base);
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	/* rtc hw init */
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	mt2712_rtc_hw_init(mt2712_rtc);
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	mt2712_rtc->irq = platform_get_irq(pdev, 0);
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	if (mt2712_rtc->irq < 0)
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		return mt2712_rtc->irq;
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	platform_set_drvdata(pdev, mt2712_rtc);
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	mt2712_rtc->rtc = devm_rtc_allocate_device(&pdev->dev);
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	if (IS_ERR(mt2712_rtc->rtc))
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		return PTR_ERR(mt2712_rtc->rtc);
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	ret = devm_request_threaded_irq(&pdev->dev, mt2712_rtc->irq, NULL,
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					rtc_irq_handler_thread,
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					IRQF_ONESHOT | IRQF_TRIGGER_LOW,
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					dev_name(&mt2712_rtc->rtc->dev),
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					mt2712_rtc);
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	if (ret) {
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		dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
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			mt2712_rtc->irq, ret);
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		return ret;
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	}
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	device_init_wakeup(&pdev->dev, true);
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	mt2712_rtc->rtc->ops = &mt2712_rtc_ops;
 | 
						|
	mt2712_rtc->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
 | 
						|
	mt2712_rtc->rtc->range_max = MT2712_RTC_TIMESTAMP_END_2127;
 | 
						|
 | 
						|
	return devm_rtc_register_device(mt2712_rtc->rtc);
 | 
						|
}
 | 
						|
 | 
						|
#ifdef CONFIG_PM_SLEEP
 | 
						|
static int mt2712_rtc_suspend(struct device *dev)
 | 
						|
{
 | 
						|
	int wake_status = 0;
 | 
						|
	struct mt2712_rtc *mt2712_rtc = dev_get_drvdata(dev);
 | 
						|
 | 
						|
	if (device_may_wakeup(dev)) {
 | 
						|
		wake_status = enable_irq_wake(mt2712_rtc->irq);
 | 
						|
		if (!wake_status)
 | 
						|
			mt2712_rtc->irq_wake_enabled = true;
 | 
						|
	}
 | 
						|
 | 
						|
	return 0;
 | 
						|
}
 | 
						|
 | 
						|
static int mt2712_rtc_resume(struct device *dev)
 | 
						|
{
 | 
						|
	int wake_status = 0;
 | 
						|
	struct mt2712_rtc *mt2712_rtc = dev_get_drvdata(dev);
 | 
						|
 | 
						|
	if (device_may_wakeup(dev) && mt2712_rtc->irq_wake_enabled) {
 | 
						|
		wake_status = disable_irq_wake(mt2712_rtc->irq);
 | 
						|
		if (!wake_status)
 | 
						|
			mt2712_rtc->irq_wake_enabled = false;
 | 
						|
	}
 | 
						|
 | 
						|
	return 0;
 | 
						|
}
 | 
						|
 | 
						|
static SIMPLE_DEV_PM_OPS(mt2712_pm_ops, mt2712_rtc_suspend,
 | 
						|
			 mt2712_rtc_resume);
 | 
						|
#endif
 | 
						|
 | 
						|
static const struct of_device_id mt2712_rtc_of_match[] = {
 | 
						|
	{ .compatible = "mediatek,mt2712-rtc", },
 | 
						|
	{ },
 | 
						|
};
 | 
						|
 | 
						|
MODULE_DEVICE_TABLE(of, mt2712_rtc_of_match);
 | 
						|
 | 
						|
static struct platform_driver mt2712_rtc_driver = {
 | 
						|
	.driver = {
 | 
						|
		.name = "mt2712-rtc",
 | 
						|
		.of_match_table = mt2712_rtc_of_match,
 | 
						|
#ifdef CONFIG_PM_SLEEP
 | 
						|
		.pm = &mt2712_pm_ops,
 | 
						|
#endif
 | 
						|
	},
 | 
						|
	.probe  = mt2712_rtc_probe,
 | 
						|
};
 | 
						|
 | 
						|
module_platform_driver(mt2712_rtc_driver);
 | 
						|
 | 
						|
MODULE_DESCRIPTION("MediaTek MT2712 SoC based RTC Driver");
 | 
						|
MODULE_AUTHOR("Ran Bi <ran.bi@mediatek.com>");
 | 
						|
MODULE_LICENSE("GPL");
 |