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74703b13f9
Advertise the two pseudo-interrupts that tied to the two PMU flavours present in the Apple M1 SoC. We choose the expose two different pseudo-interrupts to the OS as the e-core PMU is obviously different from the p-core one, effectively presenting two different devices. Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Hector Martin <marcan@marcan.st> Signed-off-by: Marc Zyngier <maz@kernel.org>
17 lines
414 B
C
17 lines
414 B
C
/* SPDX-License-Identifier: GPL-2.0+ OR MIT */
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#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_APPLE_AIC_H
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#define _DT_BINDINGS_INTERRUPT_CONTROLLER_APPLE_AIC_H
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#include <dt-bindings/interrupt-controller/irq.h>
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#define AIC_IRQ 0
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#define AIC_FIQ 1
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#define AIC_TMR_HV_PHYS 0
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#define AIC_TMR_HV_VIRT 1
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#define AIC_TMR_GUEST_PHYS 2
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#define AIC_TMR_GUEST_VIRT 3
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#define AIC_CPU_PMU_E 4
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#define AIC_CPU_PMU_P 5
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#endif
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