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The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is ignored (apart from emitting a warning) and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new(), which already returns void. Eventually after all drivers are converted, .remove_new() will be renamed to .remove(). fsl_mc_err_remove() is used as callback in two drivers. So these have to be converted together to the void returning remove callback. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20231013100422.1382040-2-u.kleine-koenig@pengutronix.de
76 lines
2.2 KiB
C
76 lines
2.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Freescale Memory Controller kernel module
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*
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* Support Power-based SoCs including MPC85xx, MPC86xx, MPC83xx and
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* ARM-based Layerscape SoCs including LS2xxx and LS1021A. Originally
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* split out from mpc85xx_edac EDAC driver.
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*
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* Author: Dave Jiang <djiang@mvista.com>
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*
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* 2006-2007 (c) MontaVista Software, Inc.
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*/
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#ifndef _FSL_DDR_EDAC_H_
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#define _FSL_DDR_EDAC_H_
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#define fsl_mc_printk(mci, level, fmt, arg...) \
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edac_mc_chipset_printk(mci, level, "FSL_DDR", fmt, ##arg)
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/*
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* DRAM error defines
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*/
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/* DDR_SDRAM_CFG */
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#define FSL_MC_DDR_SDRAM_CFG 0x0110
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#define FSL_MC_CS_BNDS_0 0x0000
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#define FSL_MC_CS_BNDS_OFS 0x0008
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#define FSL_MC_DATA_ERR_INJECT_HI 0x0e00
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#define FSL_MC_DATA_ERR_INJECT_LO 0x0e04
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#define FSL_MC_ECC_ERR_INJECT 0x0e08
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#define FSL_MC_CAPTURE_DATA_HI 0x0e20
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#define FSL_MC_CAPTURE_DATA_LO 0x0e24
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#define FSL_MC_CAPTURE_ECC 0x0e28
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#define FSL_MC_ERR_DETECT 0x0e40
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#define FSL_MC_ERR_DISABLE 0x0e44
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#define FSL_MC_ERR_INT_EN 0x0e48
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#define FSL_MC_CAPTURE_ATRIBUTES 0x0e4c
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#define FSL_MC_CAPTURE_ADDRESS 0x0e50
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#define FSL_MC_CAPTURE_EXT_ADDRESS 0x0e54
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#define FSL_MC_ERR_SBE 0x0e58
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#define DSC_MEM_EN 0x80000000
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#define DSC_ECC_EN 0x20000000
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#define DSC_RD_EN 0x10000000
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#define DSC_DBW_MASK 0x00180000
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#define DSC_DBW_32 0x00080000
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#define DSC_DBW_64 0x00000000
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#define DSC_SDTYPE_MASK 0x07000000
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#define DSC_X32_EN 0x00000020
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/* Err_Int_En */
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#define DDR_EIE_MSEE 0x1 /* memory select */
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#define DDR_EIE_SBEE 0x4 /* single-bit ECC error */
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#define DDR_EIE_MBEE 0x8 /* multi-bit ECC error */
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/* Err_Detect */
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#define DDR_EDE_MSE 0x1 /* memory select */
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#define DDR_EDE_SBE 0x4 /* single-bit ECC error */
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#define DDR_EDE_MBE 0x8 /* multi-bit ECC error */
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#define DDR_EDE_MME 0x80000000 /* multiple memory errors */
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/* Err_Disable */
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#define DDR_EDI_MSED 0x1 /* memory select disable */
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#define DDR_EDI_SBED 0x4 /* single-bit ECC error disable */
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#define DDR_EDI_MBED 0x8 /* multi-bit ECC error disable */
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struct fsl_mc_pdata {
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char *name;
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int edac_idx;
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void __iomem *mc_vbase;
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int irq;
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};
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int fsl_mc_err_probe(struct platform_device *op);
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void fsl_mc_err_remove(struct platform_device *op);
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#endif
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