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236f7d8034
The latest platforms use a different SMU message port(0x938) from the one currently being used (0x538). Make code changes to adapt to this new information. Signed-off-by: Sanket Goswami <Sanket.Goswami@amd.com> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20231228102104.1785383-7-Shyam-sundar.S-k@amd.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
57 lines
1.3 KiB
C
57 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* AMD SoC Power Management Controller Driver
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*
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* Copyright (c) 2023, Advanced Micro Devices, Inc.
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* All Rights Reserved.
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*
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* Author: Mario Limonciello <mario.limonciello@amd.com>
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*/
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#ifndef PMC_H
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#define PMC_H
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#include <linux/types.h>
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#include <linux/mutex.h>
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struct amd_pmc_dev {
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void __iomem *regbase;
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void __iomem *smu_virt_addr;
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void __iomem *stb_virt_addr;
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void __iomem *fch_virt_addr;
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bool msg_port;
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u32 base_addr;
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u32 cpu_id;
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u32 active_ips;
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u32 dram_size;
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u32 num_ips;
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u32 s2d_msg_id;
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u32 smu_msg;
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/* SMU version information */
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u8 smu_program;
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u8 major;
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u8 minor;
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u8 rev;
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struct device *dev;
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struct pci_dev *rdev;
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struct mutex lock; /* generic mutex lock */
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struct dentry *dbgfs_dir;
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struct quirk_entry *quirks;
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bool disable_8042_wakeup;
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};
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void amd_pmc_process_restore_quirks(struct amd_pmc_dev *dev);
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void amd_pmc_quirks_init(struct amd_pmc_dev *dev);
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/* List of supported CPU ids */
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#define AMD_CPU_ID_RV 0x15D0
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#define AMD_CPU_ID_RN 0x1630
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#define AMD_CPU_ID_PCO AMD_CPU_ID_RV
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#define AMD_CPU_ID_CZN AMD_CPU_ID_RN
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#define AMD_CPU_ID_YC 0x14B5
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#define AMD_CPU_ID_CB 0x14D8
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#define AMD_CPU_ID_PS 0x14E8
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#define AMD_CPU_ID_SP 0x14A4
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#define PCI_DEVICE_ID_AMD_1AH_M20H_ROOT 0x1507
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#endif /* PMC_H */
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