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2b2a26b331
If the FW reports an unrecoverable fault, we need to reset the GPU before we can start re-using it again. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Steven Price <steven.price@arm.com> Reviewed-by: Liviu Dudau <liviu.dudau@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240502183813.1612017-2-boris.brezillon@collabora.com
358 lines
11 KiB
C
358 lines
11 KiB
C
/* SPDX-License-Identifier: GPL-2.0 or MIT */
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/* Copyright 2018 Marty E. Plummer <hanetzer@startmail.com> */
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/* Copyright 2019 Linaro, Ltd, Rob Herring <robh@kernel.org> */
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/* Copyright 2023 Collabora ltd. */
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#ifndef __PANTHOR_DEVICE_H__
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#define __PANTHOR_DEVICE_H__
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#include <linux/atomic.h>
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#include <linux/io-pgtable.h>
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#include <linux/regulator/consumer.h>
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#include <linux/sched.h>
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#include <linux/spinlock.h>
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#include <drm/drm_device.h>
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#include <drm/drm_mm.h>
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#include <drm/gpu_scheduler.h>
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#include <drm/panthor_drm.h>
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struct panthor_csf;
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struct panthor_csf_ctx;
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struct panthor_device;
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struct panthor_gpu;
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struct panthor_group_pool;
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struct panthor_heap_pool;
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struct panthor_job;
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struct panthor_mmu;
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struct panthor_fw;
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struct panthor_perfcnt;
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struct panthor_vm;
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struct panthor_vm_pool;
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/**
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* enum panthor_device_pm_state - PM state
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*/
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enum panthor_device_pm_state {
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/** @PANTHOR_DEVICE_PM_STATE_SUSPENDED: Device is suspended. */
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PANTHOR_DEVICE_PM_STATE_SUSPENDED = 0,
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/** @PANTHOR_DEVICE_PM_STATE_RESUMING: Device is being resumed. */
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PANTHOR_DEVICE_PM_STATE_RESUMING,
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/** @PANTHOR_DEVICE_PM_STATE_ACTIVE: Device is active. */
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PANTHOR_DEVICE_PM_STATE_ACTIVE,
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/** @PANTHOR_DEVICE_PM_STATE_SUSPENDING: Device is being suspended. */
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PANTHOR_DEVICE_PM_STATE_SUSPENDING,
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};
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/**
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* struct panthor_irq - IRQ data
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*
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* Used to automate IRQ handling for the 3 different IRQs we have in this driver.
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*/
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struct panthor_irq {
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/** @ptdev: Panthor device */
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struct panthor_device *ptdev;
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/** @irq: IRQ number. */
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int irq;
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/** @mask: Current mask being applied to xxx_INT_MASK. */
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u32 mask;
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/** @suspended: Set to true when the IRQ is suspended. */
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atomic_t suspended;
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};
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/**
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* struct panthor_device - Panthor device
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*/
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struct panthor_device {
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/** @base: Base drm_device. */
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struct drm_device base;
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/** @phys_addr: Physical address of the iomem region. */
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phys_addr_t phys_addr;
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/** @iomem: CPU mapping of the IOMEM region. */
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void __iomem *iomem;
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/** @clks: GPU clocks. */
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struct {
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/** @core: Core clock. */
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struct clk *core;
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/** @stacks: Stacks clock. This clock is optional. */
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struct clk *stacks;
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/** @coregroup: Core group clock. This clock is optional. */
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struct clk *coregroup;
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} clks;
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/** @coherent: True if the CPU/GPU are memory coherent. */
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bool coherent;
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/** @gpu_info: GPU information. */
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struct drm_panthor_gpu_info gpu_info;
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/** @csif_info: Command stream interface information. */
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struct drm_panthor_csif_info csif_info;
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/** @gpu: GPU management data. */
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struct panthor_gpu *gpu;
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/** @fw: FW management data. */
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struct panthor_fw *fw;
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/** @mmu: MMU management data. */
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struct panthor_mmu *mmu;
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/** @scheduler: Scheduler management data. */
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struct panthor_scheduler *scheduler;
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/** @devfreq: Device frequency scaling management data. */
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struct panthor_devfreq *devfreq;
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/** @unplug: Device unplug related fields. */
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struct {
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/** @lock: Lock used to serialize unplug operations. */
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struct mutex lock;
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/**
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* @done: Completion object signaled when the unplug
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* operation is done.
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*/
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struct completion done;
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} unplug;
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/** @reset: Reset related fields. */
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struct {
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/** @wq: Ordered worqueud used to schedule reset operations. */
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struct workqueue_struct *wq;
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/** @work: Reset work. */
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struct work_struct work;
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/** @pending: Set to true if a reset is pending. */
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atomic_t pending;
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} reset;
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/** @pm: Power management related data. */
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struct {
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/** @state: Power state. */
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atomic_t state;
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/**
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* @mmio_lock: Lock protecting MMIO userspace CPU mappings.
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*
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* This is needed to ensure we map the dummy IO pages when
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* the device is being suspended, and the real IO pages when
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* the device is being resumed. We can't just do with the
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* state atomicity to deal with this race.
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*/
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struct mutex mmio_lock;
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/**
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* @dummy_latest_flush: Dummy LATEST_FLUSH page.
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*
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* Used to replace the real LATEST_FLUSH page when the GPU
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* is suspended.
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*/
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struct page *dummy_latest_flush;
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} pm;
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};
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/**
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* struct panthor_file - Panthor file
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*/
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struct panthor_file {
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/** @ptdev: Device attached to this file. */
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struct panthor_device *ptdev;
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/** @vms: VM pool attached to this file. */
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struct panthor_vm_pool *vms;
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/** @groups: Scheduling group pool attached to this file. */
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struct panthor_group_pool *groups;
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};
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int panthor_device_init(struct panthor_device *ptdev);
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void panthor_device_unplug(struct panthor_device *ptdev);
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/**
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* panthor_device_schedule_reset() - Schedules a reset operation
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*/
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static inline void panthor_device_schedule_reset(struct panthor_device *ptdev)
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{
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if (!atomic_cmpxchg(&ptdev->reset.pending, 0, 1) &&
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atomic_read(&ptdev->pm.state) == PANTHOR_DEVICE_PM_STATE_ACTIVE)
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queue_work(ptdev->reset.wq, &ptdev->reset.work);
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}
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/**
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* panthor_device_reset_is_pending() - Checks if a reset is pending.
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*
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* Return: true if a reset is pending, false otherwise.
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*/
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static inline bool panthor_device_reset_is_pending(struct panthor_device *ptdev)
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{
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return atomic_read(&ptdev->reset.pending) != 0;
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}
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int panthor_device_mmap_io(struct panthor_device *ptdev,
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struct vm_area_struct *vma);
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int panthor_device_resume(struct device *dev);
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int panthor_device_suspend(struct device *dev);
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enum drm_panthor_exception_type {
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DRM_PANTHOR_EXCEPTION_OK = 0x00,
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DRM_PANTHOR_EXCEPTION_TERMINATED = 0x04,
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DRM_PANTHOR_EXCEPTION_KABOOM = 0x05,
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DRM_PANTHOR_EXCEPTION_EUREKA = 0x06,
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DRM_PANTHOR_EXCEPTION_ACTIVE = 0x08,
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DRM_PANTHOR_EXCEPTION_CS_RES_TERM = 0x0f,
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DRM_PANTHOR_EXCEPTION_MAX_NON_FAULT = 0x3f,
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DRM_PANTHOR_EXCEPTION_CS_CONFIG_FAULT = 0x40,
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DRM_PANTHOR_EXCEPTION_CS_UNRECOVERABLE = 0x41,
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DRM_PANTHOR_EXCEPTION_CS_ENDPOINT_FAULT = 0x44,
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DRM_PANTHOR_EXCEPTION_CS_BUS_FAULT = 0x48,
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DRM_PANTHOR_EXCEPTION_CS_INSTR_INVALID = 0x49,
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DRM_PANTHOR_EXCEPTION_CS_CALL_STACK_OVERFLOW = 0x4a,
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DRM_PANTHOR_EXCEPTION_CS_INHERIT_FAULT = 0x4b,
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DRM_PANTHOR_EXCEPTION_INSTR_INVALID_PC = 0x50,
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DRM_PANTHOR_EXCEPTION_INSTR_INVALID_ENC = 0x51,
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DRM_PANTHOR_EXCEPTION_INSTR_BARRIER_FAULT = 0x55,
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DRM_PANTHOR_EXCEPTION_DATA_INVALID_FAULT = 0x58,
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DRM_PANTHOR_EXCEPTION_TILE_RANGE_FAULT = 0x59,
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DRM_PANTHOR_EXCEPTION_ADDR_RANGE_FAULT = 0x5a,
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DRM_PANTHOR_EXCEPTION_IMPRECISE_FAULT = 0x5b,
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DRM_PANTHOR_EXCEPTION_OOM = 0x60,
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DRM_PANTHOR_EXCEPTION_CSF_FW_INTERNAL_ERROR = 0x68,
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DRM_PANTHOR_EXCEPTION_CSF_RES_EVICTION_TIMEOUT = 0x69,
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DRM_PANTHOR_EXCEPTION_GPU_BUS_FAULT = 0x80,
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DRM_PANTHOR_EXCEPTION_GPU_SHAREABILITY_FAULT = 0x88,
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DRM_PANTHOR_EXCEPTION_SYS_SHAREABILITY_FAULT = 0x89,
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DRM_PANTHOR_EXCEPTION_GPU_CACHEABILITY_FAULT = 0x8a,
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DRM_PANTHOR_EXCEPTION_TRANSLATION_FAULT_0 = 0xc0,
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DRM_PANTHOR_EXCEPTION_TRANSLATION_FAULT_1 = 0xc1,
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DRM_PANTHOR_EXCEPTION_TRANSLATION_FAULT_2 = 0xc2,
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DRM_PANTHOR_EXCEPTION_TRANSLATION_FAULT_3 = 0xc3,
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DRM_PANTHOR_EXCEPTION_TRANSLATION_FAULT_4 = 0xc4,
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DRM_PANTHOR_EXCEPTION_PERM_FAULT_0 = 0xc8,
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DRM_PANTHOR_EXCEPTION_PERM_FAULT_1 = 0xc9,
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DRM_PANTHOR_EXCEPTION_PERM_FAULT_2 = 0xca,
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DRM_PANTHOR_EXCEPTION_PERM_FAULT_3 = 0xcb,
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DRM_PANTHOR_EXCEPTION_ACCESS_FLAG_1 = 0xd9,
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DRM_PANTHOR_EXCEPTION_ACCESS_FLAG_2 = 0xda,
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DRM_PANTHOR_EXCEPTION_ACCESS_FLAG_3 = 0xdb,
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DRM_PANTHOR_EXCEPTION_ADDR_SIZE_FAULT_IN = 0xe0,
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DRM_PANTHOR_EXCEPTION_ADDR_SIZE_FAULT_OUT0 = 0xe4,
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DRM_PANTHOR_EXCEPTION_ADDR_SIZE_FAULT_OUT1 = 0xe5,
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DRM_PANTHOR_EXCEPTION_ADDR_SIZE_FAULT_OUT2 = 0xe6,
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DRM_PANTHOR_EXCEPTION_ADDR_SIZE_FAULT_OUT3 = 0xe7,
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DRM_PANTHOR_EXCEPTION_MEM_ATTR_FAULT_0 = 0xe8,
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DRM_PANTHOR_EXCEPTION_MEM_ATTR_FAULT_1 = 0xe9,
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DRM_PANTHOR_EXCEPTION_MEM_ATTR_FAULT_2 = 0xea,
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DRM_PANTHOR_EXCEPTION_MEM_ATTR_FAULT_3 = 0xeb,
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};
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/**
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* panthor_exception_is_fault() - Checks if an exception is a fault.
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*
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* Return: true if the exception is a fault, false otherwise.
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*/
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static inline bool
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panthor_exception_is_fault(u32 exception_code)
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{
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return exception_code > DRM_PANTHOR_EXCEPTION_MAX_NON_FAULT;
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}
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const char *panthor_exception_name(struct panthor_device *ptdev,
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u32 exception_code);
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/**
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* PANTHOR_IRQ_HANDLER() - Define interrupt handlers and the interrupt
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* registration function.
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*
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* The boiler-plate to gracefully deal with shared interrupts is
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* auto-generated. All you have to do is call PANTHOR_IRQ_HANDLER()
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* just after the actual handler. The handler prototype is:
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*
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* void (*handler)(struct panthor_device *, u32 status);
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*/
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#define PANTHOR_IRQ_HANDLER(__name, __reg_prefix, __handler) \
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static irqreturn_t panthor_ ## __name ## _irq_raw_handler(int irq, void *data) \
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{ \
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struct panthor_irq *pirq = data; \
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struct panthor_device *ptdev = pirq->ptdev; \
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\
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if (atomic_read(&pirq->suspended)) \
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return IRQ_NONE; \
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if (!gpu_read(ptdev, __reg_prefix ## _INT_STAT)) \
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return IRQ_NONE; \
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\
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gpu_write(ptdev, __reg_prefix ## _INT_MASK, 0); \
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return IRQ_WAKE_THREAD; \
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} \
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\
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static irqreturn_t panthor_ ## __name ## _irq_threaded_handler(int irq, void *data) \
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{ \
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struct panthor_irq *pirq = data; \
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struct panthor_device *ptdev = pirq->ptdev; \
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irqreturn_t ret = IRQ_NONE; \
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\
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while (true) { \
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u32 status = gpu_read(ptdev, __reg_prefix ## _INT_RAWSTAT) & pirq->mask; \
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\
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if (!status) \
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break; \
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\
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gpu_write(ptdev, __reg_prefix ## _INT_CLEAR, status); \
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\
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__handler(ptdev, status); \
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ret = IRQ_HANDLED; \
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} \
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\
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if (!atomic_read(&pirq->suspended)) \
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gpu_write(ptdev, __reg_prefix ## _INT_MASK, pirq->mask); \
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\
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return ret; \
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} \
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\
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static inline void panthor_ ## __name ## _irq_suspend(struct panthor_irq *pirq) \
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{ \
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pirq->mask = 0; \
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gpu_write(pirq->ptdev, __reg_prefix ## _INT_MASK, 0); \
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synchronize_irq(pirq->irq); \
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atomic_set(&pirq->suspended, true); \
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} \
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\
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static inline void panthor_ ## __name ## _irq_resume(struct panthor_irq *pirq, u32 mask) \
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{ \
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atomic_set(&pirq->suspended, false); \
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pirq->mask = mask; \
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gpu_write(pirq->ptdev, __reg_prefix ## _INT_CLEAR, mask); \
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gpu_write(pirq->ptdev, __reg_prefix ## _INT_MASK, mask); \
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} \
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\
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static int panthor_request_ ## __name ## _irq(struct panthor_device *ptdev, \
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struct panthor_irq *pirq, \
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int irq, u32 mask) \
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{ \
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pirq->ptdev = ptdev; \
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pirq->irq = irq; \
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panthor_ ## __name ## _irq_resume(pirq, mask); \
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\
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return devm_request_threaded_irq(ptdev->base.dev, irq, \
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panthor_ ## __name ## _irq_raw_handler, \
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panthor_ ## __name ## _irq_threaded_handler, \
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IRQF_SHARED, KBUILD_MODNAME "-" # __name, \
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pirq); \
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}
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extern struct workqueue_struct *panthor_cleanup_wq;
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#endif
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