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	request_irq() is preferred over setup_irq(). The early boot setup_irq() invocations happen either via 'init_IRQ()' or 'time_init()', while memory allocators are ready by 'mm_init()'. Per tglx[1], setup_irq() existed in olden days when allocators were not ready by the time early interrupts were initialized. Hence replace setup_irq() by request_irq(). Seldom remove_irq() usage has been observed coupled with setup_irq(), wherever that has been found, it too has been replaced by free_irq(). A build error that was reported by kbuild test robot <lkp@intel.com> in the previous version of the patch also has been fixed. [1] https://lkml.kernel.org/r/alpine.DEB.2.20.1710191609480.1971@nanos Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/91961c77c1cf93d41523f5e1ac52043f32f97077.1582799709.git.afzal.mohd.ma@gmail.com
		
			
				
	
	
		
			150 lines
		
	
	
	
		
			3.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			150 lines
		
	
	
	
		
			3.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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 *  arch/arm/mach-vt8500/timer.c
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 *
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 *  Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
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 *  Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
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 */
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/*
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 * This file is copied and modified from the original timer.c provided by
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 * Alexey Charkov. Minor changes have been made for Device Tree Support.
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 */
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <linux/delay.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#define VT8500_TIMER_OFFSET	0x0100
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#define VT8500_TIMER_HZ		3000000
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#define TIMER_MATCH_VAL		0x0000
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#define TIMER_COUNT_VAL		0x0010
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#define TIMER_STATUS_VAL	0x0014
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#define TIMER_IER_VAL		0x001c		/* interrupt enable */
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#define TIMER_CTRL_VAL		0x0020
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#define TIMER_AS_VAL		0x0024		/* access status */
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#define TIMER_COUNT_R_ACTIVE	(1 << 5)	/* not ready for read */
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#define TIMER_COUNT_W_ACTIVE	(1 << 4)	/* not ready for write */
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#define TIMER_MATCH_W_ACTIVE	(1 << 0)	/* not ready for write */
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#define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
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#define MIN_OSCR_DELTA		16
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static void __iomem *regbase;
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static u64 vt8500_timer_read(struct clocksource *cs)
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{
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	int loops = msecs_to_loops(10);
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	writel(3, regbase + TIMER_CTRL_VAL);
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	while ((readl((regbase + TIMER_AS_VAL)) & TIMER_COUNT_R_ACTIVE)
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						&& --loops)
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		cpu_relax();
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	return readl(regbase + TIMER_COUNT_VAL);
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}
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static struct clocksource clocksource = {
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	.name           = "vt8500_timer",
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	.rating         = 200,
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	.read           = vt8500_timer_read,
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	.mask           = CLOCKSOURCE_MASK(32),
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	.flags          = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static int vt8500_timer_set_next_event(unsigned long cycles,
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				    struct clock_event_device *evt)
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{
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	int loops = msecs_to_loops(10);
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	u64 alarm = clocksource.read(&clocksource) + cycles;
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	while ((readl(regbase + TIMER_AS_VAL) & TIMER_MATCH_W_ACTIVE)
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						&& --loops)
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		cpu_relax();
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	writel((unsigned long)alarm, regbase + TIMER_MATCH_VAL);
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	if ((signed)(alarm - clocksource.read(&clocksource)) <= MIN_OSCR_DELTA)
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		return -ETIME;
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	writel(1, regbase + TIMER_IER_VAL);
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	return 0;
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}
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static int vt8500_shutdown(struct clock_event_device *evt)
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{
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	writel(readl(regbase + TIMER_CTRL_VAL) | 1, regbase + TIMER_CTRL_VAL);
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	writel(0, regbase + TIMER_IER_VAL);
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	return 0;
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}
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static struct clock_event_device clockevent = {
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	.name			= "vt8500_timer",
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	.features		= CLOCK_EVT_FEAT_ONESHOT,
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	.rating			= 200,
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	.set_next_event		= vt8500_timer_set_next_event,
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	.set_state_shutdown	= vt8500_shutdown,
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	.set_state_oneshot	= vt8500_shutdown,
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};
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static irqreturn_t vt8500_timer_interrupt(int irq, void *dev_id)
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{
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	struct clock_event_device *evt = dev_id;
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	writel(0xf, regbase + TIMER_STATUS_VAL);
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	evt->event_handler(evt);
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	return IRQ_HANDLED;
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}
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static int __init vt8500_timer_init(struct device_node *np)
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{
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	int timer_irq, ret;
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	regbase = of_iomap(np, 0);
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	if (!regbase) {
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		pr_err("%s: Missing iobase description in Device Tree\n",
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								__func__);
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		return -ENXIO;
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	}
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	timer_irq = irq_of_parse_and_map(np, 0);
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	if (!timer_irq) {
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		pr_err("%s: Missing irq description in Device Tree\n",
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								__func__);
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		return -EINVAL;
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	}
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	writel(1, regbase + TIMER_CTRL_VAL);
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	writel(0xf, regbase + TIMER_STATUS_VAL);
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	writel(~0, regbase + TIMER_MATCH_VAL);
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	ret = clocksource_register_hz(&clocksource, VT8500_TIMER_HZ);
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	if (ret) {
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		pr_err("%s: clocksource_register failed for %s\n",
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		       __func__, clocksource.name);
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		return ret;
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	}
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	clockevent.cpumask = cpumask_of(0);
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	ret = request_irq(timer_irq, vt8500_timer_interrupt,
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			  IRQF_TIMER | IRQF_IRQPOLL, "vt8500_timer",
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			  &clockevent);
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	if (ret) {
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		pr_err("%s: setup_irq failed for %s\n", __func__,
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							clockevent.name);
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		return ret;
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	}
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	clockevents_config_and_register(&clockevent, VT8500_TIMER_HZ,
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					MIN_OSCR_DELTA * 2, 0xf0000000);
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	return 0;
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}
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TIMER_OF_DECLARE(vt8500, "via,vt8500-timer", vt8500_timer_init);
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