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05255ccbf1
Clean up the top level include/drm directory by grouping all the Intel specific files under a common subdirectory. Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Dave Airlie <airlied@gmail.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Acked-by: Lucas De Marchi <lucas.demarchi@intel.com> Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/ae224504d99cc6428da6dced9dcde2b7953624ef.1717075103.git.jani.nikula@intel.com
39 lines
1,015 B
C
39 lines
1,015 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Common header for intel-gtt.ko and i915.ko */
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#ifndef _DRM_INTEL_GTT_H
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#define _DRM_INTEL_GTT_H
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#include <linux/types.h>
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struct agp_bridge_data;
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struct pci_dev;
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struct sg_table;
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void intel_gmch_gtt_get(u64 *gtt_total,
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phys_addr_t *mappable_base,
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resource_size_t *mappable_end);
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int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
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struct agp_bridge_data *bridge);
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void intel_gmch_remove(void);
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bool intel_gmch_enable_gtt(void);
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void intel_gmch_gtt_flush(void);
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void intel_gmch_gtt_insert_page(dma_addr_t addr,
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unsigned int pg,
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unsigned int flags);
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void intel_gmch_gtt_insert_sg_entries(struct sg_table *st,
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unsigned int pg_start,
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unsigned int flags);
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void intel_gmch_gtt_clear_range(unsigned int first_entry, unsigned int num_entries);
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/* Special gtt memory types */
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#define AGP_DCACHE_MEMORY 1
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#define AGP_PHYS_MEMORY 2
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/* flag for GFDT type */
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#define AGP_USER_CACHED_MEMORY_GFDT (1 << 3)
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#endif
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