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73048bda46
If PCIe supports atomics, configure register to prevent DF from
breaking atomics in separate load/store operations.
Signed-off-by: David Belanger <david.belanger@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 666f14cab2)
45 lines
1.7 KiB
C
45 lines
1.7 KiB
C
/*
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* Copyright 2024 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "amdgpu.h"
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#include "df_v4_15.h"
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#include "df/df_4_15_offset.h"
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#include "df/df_4_15_sh_mask.h"
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static void df_v4_15_hw_init(struct amdgpu_device *adev)
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{
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if (adev->have_atomics_support) {
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uint32_t tmp;
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uint32_t dis_lcl_proc = (1 << 1 |
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1 << 2 |
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1 << 13);
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tmp = RREG32_SOC15(DF, 0, regNCSConfigurationRegister1);
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tmp |= (dis_lcl_proc << NCSConfigurationRegister1__DisIntAtomicsLclProcessing__SHIFT);
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WREG32_SOC15(DF, 0, regNCSConfigurationRegister1, tmp);
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}
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}
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const struct amdgpu_df_funcs df_v4_15_funcs = {
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.hw_init = df_v4_15_hw_init
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};
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