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Broadcom Northstar Plus family of SoCs are used for switching control and management applications as well as residential router/gateway applications. The SoC features dual core Cortex A9 ARM CPUs, integrating several peripheral interfaces including multiple Gigabit Ethernet PHYs, DDR3 memory, PCIE Gen-2, USB 2.0 and USB 3.0, serial and NAND flash, SATA and several other IO controllers. Signed-off-by: Kapil Hali <kapilh@broadcom.com> Signed-off-by: Jon Mason <jonmason@broadcom.com> Acked-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
25 lines
752 B
C
25 lines
752 B
C
/*
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* Copyright (C) 2015 Broadcom Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <asm/mach/arch.h>
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static const char *const bcm_nsp_dt_compat[] __initconst = {
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"brcm,nsp",
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NULL,
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};
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DT_MACHINE_START(NSP_DT, "Broadcom Northstar Plus SoC")
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.l2c_aux_val = 0,
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.l2c_aux_mask = ~0,
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.dt_compat = bcm_nsp_dt_compat,
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MACHINE_END
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