Anthony Koo ba45df4cb7 drm/amd/display: Expose target backlight level ... [Why] DM may want to understand any backlight optimizations applied, so DM needs a way to query from the HW both the real current backlight, which may be value during transition. And also target backlight, which may be after some backlight optimizations applied. [How] Add interface to query current and target backlight levels Target level may indicate backlight level after backlight optimization and reductions are applied. Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2018-11-05 14:21:43 -05:00
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hw	drm/amd/display: Expose target backlight level	2018-11-05 14:21:43 -05:00
bw_fixed.h	drm/amd/display: explicit uint64_t casting	2018-11-05 14:20:50 -05:00
clock_source.h	drm/amd/display: remove unused clk_src code	2018-09-10 22:42:55 -05:00
compressor.h
core_status.h
core_types.h	drm/amd/display: add dccg block	2018-11-05 14:20:48 -05:00
custom_float.h
dc_link_ddc.h	drm/amd/display: Return aux replies directly to DRM	2018-07-13 14:48:36 -05:00
dc_link_dp.h	drm/amd/display: Retry link training again	2018-07-27 09:07:42 -05:00
dce_calcs.h	drm/amdgpu/display: remove VEGAM config option	2018-05-18 16:08:18 -05:00
dcn_calcs.h	drm/amd/display: rename dccg to clk_mgr	2018-11-05 14:20:48 -05:00
hw_sequencer.h	drm/amd/display: Remove program_csc_matrix	2018-11-05 14:21:40 -05:00
link_hwss.h	drm/amd/display: add eDP 1.2+ polling for T7	2018-02-19 14:19:34 -05:00
reg_helper.h	drm/amd/display: generic indirect register access	2018-07-13 14:47:33 -05:00
resource.h	drm/amd/display: move pplib/smu notification to dccg block	2018-11-05 14:20:40 -05:00