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SDM845 SoC includes the Mobile Display Sub System (MDSS) which is a
top level wrapper consisting of Display Processing Unit (DPU) and
display peripheral modules such as Display Serial Interface (DSI)
and DisplayPort (DP).
MDSS functions essentially as a back-end composition engine. It blends
video and graphic images stored in the frame buffers and scans out the
composed image to a display sink (over DSI/DP).
The following diagram represents hardware blocks for a simple pipeline
(two planes are present on a given crtc which is connected to a DSI
connector):
MDSS
+---------------------------------+
| +-----------------------------+ |
| | DPU | |
| | +--------+ +--------+ | |
| | | SSPP | | SSPP | | |
| | +----+---+ +----+---+ | |
| | | | | |
| | +----v-----------v---+ | |
| | | Layer Mixer (LM) | | |
| | +--------------------+ | |
| | +--------------------+ | |
| | | PingPong (PP) | | |
| | +--------------------+ | |
| | +--------------------+ | |
| | | INTERFACE (VIDEO) | | |
| | +---+----------------+ | |
| +------|----------------------+ |
| | |
| +------|---------------------+ |
| | | DISPLAY PERIPHERALS | |
| | +---v-+ +-----+ | |
| | | DSI | | DP | | |
| | +-----+ +-----+ | |
| +----------------------------+ |
+---------------------------------+
The number of DPU sub-blocks (i.e. SSPPs, LMs, PP blocks and INTFs)
depends on SoC capabilities.
Overview of DPU sub-blocks:
---------------------------
* Source Surface Processor (SSPP):
Refers to any of hardware pipes like ViG, DMA etc. Only ViG pipes are
capable of performing format conversion, scaling and quality improvement
for source surfaces.
* Layer Mixer (LM):
Blend source surfaces together (in requested zorder)
* PingPong (PP):
This block controls frame done interrupt output, EOL and EOF generation,
overflow/underflow control.
* Display interface (INTF):
Timing generator and interface connecting the display peripherals.
DRM components mapping to DPU architecture:
------------------------------------------
PLANEs maps to SSPPs
CRTC maps to LMs
Encoder maps to PPs, INTFs
Data flow setup:
---------------
MDSS hardware can support various data flows (e.g.):
- Dual pipe: Output from two LMs combined to single display.
- Split display: Output from two LMs connected to two separate
interfaces.
The hardware capabilities determine the number of concurrent data paths
possible. Any control path (i.e. pipeline w/i DPU) can be routed to any
of the hardware data paths. A given control path can be triggered,
flushed and controlled independently.
Changes in v3:
- Move msm_media_info.h from uapi to dpu/ subdir
- Remove preclose callback dpu (it's handled in core)
- Fix kbuild warnings with parent_ops
- Remove unused functions from dpu_core_irq
- Rename mdss_phys to mdss
- Rename mdp_phys address space to mdp
- Drop _phys from vbif and regdma binding names
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rajesh Yadav <ryadav@codeaurora.org>
Signed-off-by: Sravanthi Kollukuduru <skolluku@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
[robclark minor rebase]
Signed-off-by: Rob Clark <robdclark@gmail.com>
115 lines
3.8 KiB
C
115 lines
3.8 KiB
C
/*
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* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __MSM_KMS_H__
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#define __MSM_KMS_H__
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#include <linux/clk.h>
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#include <linux/regulator/consumer.h>
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#include "msm_drv.h"
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#define MAX_PLANE 4
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/* As there are different display controller blocks depending on the
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* snapdragon version, the kms support is split out and the appropriate
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* implementation is loaded at runtime. The kms module is responsible
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* for constructing the appropriate planes/crtcs/encoders/connectors.
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*/
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struct msm_kms_funcs {
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/* hw initialization: */
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int (*hw_init)(struct msm_kms *kms);
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/* irq handling: */
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void (*irq_preinstall)(struct msm_kms *kms);
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int (*irq_postinstall)(struct msm_kms *kms);
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void (*irq_uninstall)(struct msm_kms *kms);
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irqreturn_t (*irq)(struct msm_kms *kms);
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int (*enable_vblank)(struct msm_kms *kms, struct drm_crtc *crtc);
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void (*disable_vblank)(struct msm_kms *kms, struct drm_crtc *crtc);
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/* modeset, bracketing atomic_commit(): */
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void (*prepare_commit)(struct msm_kms *kms, struct drm_atomic_state *state);
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void (*commit)(struct msm_kms *kms, struct drm_atomic_state *state);
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void (*complete_commit)(struct msm_kms *kms, struct drm_atomic_state *state);
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/* functions to wait for atomic commit completed on each CRTC */
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void (*wait_for_crtc_commit_done)(struct msm_kms *kms,
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struct drm_crtc *crtc);
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/* get msm_format w/ optional format modifiers from drm_mode_fb_cmd2 */
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const struct msm_format *(*get_format)(struct msm_kms *kms,
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const uint32_t format,
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const uint64_t modifiers);
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/* do format checking on format modified through fb_cmd2 modifiers */
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int (*check_modified_format)(const struct msm_kms *kms,
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const struct msm_format *msm_fmt,
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const struct drm_mode_fb_cmd2 *cmd,
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struct drm_gem_object **bos);
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/* misc: */
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long (*round_pixclk)(struct msm_kms *kms, unsigned long rate,
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struct drm_encoder *encoder);
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int (*set_split_display)(struct msm_kms *kms,
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struct drm_encoder *encoder,
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struct drm_encoder *slave_encoder,
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bool is_cmd_mode);
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void (*set_encoder_mode)(struct msm_kms *kms,
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struct drm_encoder *encoder,
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bool cmd_mode);
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/* pm suspend/resume hooks */
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int (*pm_suspend)(struct device *dev);
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int (*pm_resume)(struct device *dev);
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/* cleanup: */
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void (*destroy)(struct msm_kms *kms);
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#ifdef CONFIG_DEBUG_FS
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/* debugfs: */
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int (*debugfs_init)(struct msm_kms *kms, struct drm_minor *minor);
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#endif
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};
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struct msm_kms {
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const struct msm_kms_funcs *funcs;
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/* irq number to be passed on to drm_irq_install */
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int irq;
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/* mapper-id used to request GEM buffer mapped for scanout: */
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struct msm_gem_address_space *aspace;
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};
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static inline void msm_kms_init(struct msm_kms *kms,
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const struct msm_kms_funcs *funcs)
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{
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kms->funcs = funcs;
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}
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struct msm_kms *mdp4_kms_init(struct drm_device *dev);
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struct msm_kms *mdp5_kms_init(struct drm_device *dev);
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struct msm_kms *dpu_kms_init(struct drm_device *dev);
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struct msm_mdss_funcs {
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int (*enable)(struct msm_mdss *mdss);
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int (*disable)(struct msm_mdss *mdss);
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void (*destroy)(struct drm_device *dev);
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};
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struct msm_mdss {
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struct drm_device *dev;
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const struct msm_mdss_funcs *funcs;
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};
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int mdp5_mdss_init(struct drm_device *dev);
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int dpu_mdss_init(struct drm_device *dev);
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#endif /* __MSM_KMS_H__ */
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