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	- Stop reprogramming the MC, the vbios already does this in asic_init - Reduce internal gart to 256M (this does not affect the ttm GTT pool size) - Initial support for huge pages - Rework bo migration logic - Lots of improvements for vega10 - Powerplay fixes - Additional Raven enablement - SR-IOV improvements - Bug fixes - Code cleanup * 'drm-next-4.14' of git://people.freedesktop.org/~agd5f/linux: (138 commits) drm/amdgpu: fix header on gfx9 clear state drm/amdgpu: reduce the time of reading VBIOS drm/amdgpu/virtual_dce: Remove the rmmod error message drm/amdgpu/gmc9: disable legacy vga features in gmc init drm/amdgpu/gmc8: disable legacy vga features in gmc init drm/amdgpu/gmc7: disable legacy vga features in gmc init drm/amdgpu/gmc6: disable legacy vga features in gmc init (v2) drm/radeon: Set depth on low mem to 16 bpp instead of 8 bpp drm/amdgpu: fix the incorrect scratch reg number on gfx v6 drm/amdgpu: fix the incorrect scratch reg number on gfx v7 drm/amdgpu: fix the incorrect scratch reg number on gfx v8 drm/amdgpu: fix the incorrect scratch reg number on gfx v9 drm/amd/powerplay: add support for 3DP 4K@120Hz on vega10. drm/amdgpu: enable huge page handling in the VM v5 drm/amdgpu: increase fragmentation size for Vega10 v2 drm/amdgpu: ttm_bind only when user needs gpu_addr in bo pin drm/amdgpu: correct clock info for SRIOV drm/amdgpu/gmc8: SRIOV need to program fb location drm/amdgpu: disable firmware loading for psp v10 drm/amdgpu:fix gfx fence allocate size ...
		
			
				
	
	
		
			578 lines
		
	
	
	
		
			16 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			578 lines
		
	
	
	
		
			16 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Copyright 2008 Advanced Micro Devices, Inc.
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 * Copyright 2008 Red Hat Inc.
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 * Copyright 2009 Jerome Glisse.
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * copy of this software and associated documentation files (the "Software"),
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 * to deal in the Software without restriction, including without limitation
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 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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 * and/or sell copies of the Software, and to permit persons to whom the
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 * Software is furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
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 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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 * OTHER DEALINGS IN THE SOFTWARE.
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 *
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 * Authors: Dave Airlie
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 *          Alex Deucher
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 *          Jerome Glisse
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 */
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#include <drm/drmP.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/radeon_drm.h>
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#include "radeon_reg.h"
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#include "radeon.h"
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#include "atom.h"
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#include <linux/pm_runtime.h>
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#define RADEON_WAIT_IDLE_TIMEOUT 200
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/**
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 * radeon_driver_irq_handler_kms - irq handler for KMS
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 *
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 * @int irq, void *arg: args
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 *
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 * This is the irq handler for the radeon KMS driver (all asics).
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 * radeon_irq_process is a macro that points to the per-asic
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 * irq handler callback.
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 */
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irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg)
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{
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	struct drm_device *dev = (struct drm_device *) arg;
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	struct radeon_device *rdev = dev->dev_private;
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	irqreturn_t ret;
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	ret = radeon_irq_process(rdev);
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	if (ret == IRQ_HANDLED)
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		pm_runtime_mark_last_busy(dev->dev);
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	return ret;
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}
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/*
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 * Handle hotplug events outside the interrupt handler proper.
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 */
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/**
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 * radeon_hotplug_work_func - display hotplug work handler
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 *
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 * @work: work struct
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 *
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 * This is the hot plug event work handler (all asics).
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 * The work gets scheduled from the irq handler if there
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 * was a hot plug interrupt.  It walks the connector table
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 * and calls the hotplug handler for each one, then sends
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 * a drm hotplug event to alert userspace.
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 */
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static void radeon_hotplug_work_func(struct work_struct *work)
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{
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	struct radeon_device *rdev = container_of(work, struct radeon_device,
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						  hotplug_work.work);
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	struct drm_device *dev = rdev->ddev;
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	struct drm_mode_config *mode_config = &dev->mode_config;
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	struct drm_connector *connector;
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	/* we can race here at startup, some boards seem to trigger
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	 * hotplug irqs when they shouldn't. */
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	if (!rdev->mode_info.mode_config_initialized)
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		return;
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	mutex_lock(&mode_config->mutex);
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	list_for_each_entry(connector, &mode_config->connector_list, head)
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		radeon_connector_hotplug(connector);
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	mutex_unlock(&mode_config->mutex);
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	/* Just fire off a uevent and let userspace tell us what to do */
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	drm_helper_hpd_irq_event(dev);
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}
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static void radeon_dp_work_func(struct work_struct *work)
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{
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	struct radeon_device *rdev = container_of(work, struct radeon_device,
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						  dp_work);
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	struct drm_device *dev = rdev->ddev;
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	struct drm_mode_config *mode_config = &dev->mode_config;
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	struct drm_connector *connector;
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	/* this should take a mutex */
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	list_for_each_entry(connector, &mode_config->connector_list, head)
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		radeon_connector_hotplug(connector);
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}
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/**
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 * radeon_driver_irq_preinstall_kms - drm irq preinstall callback
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 *
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 * @dev: drm dev pointer
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 *
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 * Gets the hw ready to enable irqs (all asics).
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 * This function disables all interrupt sources on the GPU.
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 */
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void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
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{
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	struct radeon_device *rdev = dev->dev_private;
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	unsigned long irqflags;
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	unsigned i;
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	spin_lock_irqsave(&rdev->irq.lock, irqflags);
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	/* Disable *all* interrupts */
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	for (i = 0; i < RADEON_NUM_RINGS; i++)
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		atomic_set(&rdev->irq.ring_int[i], 0);
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	rdev->irq.dpm_thermal = false;
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	for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
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		rdev->irq.hpd[i] = false;
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	for (i = 0; i < RADEON_MAX_CRTCS; i++) {
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		rdev->irq.crtc_vblank_int[i] = false;
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		atomic_set(&rdev->irq.pflip[i], 0);
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		rdev->irq.afmt[i] = false;
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	}
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	radeon_irq_set(rdev);
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	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
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	/* Clear bits */
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	radeon_irq_process(rdev);
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}
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/**
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 * radeon_driver_irq_postinstall_kms - drm irq preinstall callback
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 *
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 * @dev: drm dev pointer
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 *
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 * Handles stuff to be done after enabling irqs (all asics).
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 * Returns 0 on success.
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 */
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int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
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{
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	struct radeon_device *rdev = dev->dev_private;
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	if (ASIC_IS_AVIVO(rdev))
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		dev->max_vblank_count = 0x00ffffff;
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	else
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		dev->max_vblank_count = 0x001fffff;
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	return 0;
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}
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/**
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 * radeon_driver_irq_uninstall_kms - drm irq uninstall callback
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 *
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 * @dev: drm dev pointer
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 *
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 * This function disables all interrupt sources on the GPU (all asics).
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 */
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void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
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{
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	struct radeon_device *rdev = dev->dev_private;
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	unsigned long irqflags;
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	unsigned i;
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	if (rdev == NULL) {
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		return;
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	}
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	spin_lock_irqsave(&rdev->irq.lock, irqflags);
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	/* Disable *all* interrupts */
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	for (i = 0; i < RADEON_NUM_RINGS; i++)
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		atomic_set(&rdev->irq.ring_int[i], 0);
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	rdev->irq.dpm_thermal = false;
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	for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
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		rdev->irq.hpd[i] = false;
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	for (i = 0; i < RADEON_MAX_CRTCS; i++) {
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		rdev->irq.crtc_vblank_int[i] = false;
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		atomic_set(&rdev->irq.pflip[i], 0);
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		rdev->irq.afmt[i] = false;
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	}
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	radeon_irq_set(rdev);
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	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
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}
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/**
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 * radeon_msi_ok - asic specific msi checks
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 *
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 * @rdev: radeon device pointer
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 *
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 * Handles asic specific MSI checks to determine if
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 * MSIs should be enabled on a particular chip (all asics).
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 * Returns true if MSIs should be enabled, false if MSIs
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 * should not be enabled.
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 */
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static bool radeon_msi_ok(struct radeon_device *rdev)
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{
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	/* RV370/RV380 was first asic with MSI support */
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	if (rdev->family < CHIP_RV380)
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		return false;
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	/* MSIs don't work on AGP */
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	if (rdev->flags & RADEON_IS_AGP)
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		return false;
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	/*
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	 * Older chips have a HW limitation, they can only generate 40 bits
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	 * of address for "64-bit" MSIs which breaks on some platforms, notably
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	 * IBM POWER servers, so we limit them
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	 */
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	if (rdev->family < CHIP_BONAIRE) {
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		dev_info(rdev->dev, "radeon: MSI limited to 32-bit\n");
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		rdev->pdev->no_64bit_msi = 1;
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	}
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	/* force MSI on */
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	if (radeon_msi == 1)
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		return true;
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	else if (radeon_msi == 0)
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		return false;
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	/* Quirks */
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	/* HP RS690 only seems to work with MSIs. */
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	if ((rdev->pdev->device == 0x791f) &&
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	    (rdev->pdev->subsystem_vendor == 0x103c) &&
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	    (rdev->pdev->subsystem_device == 0x30c2))
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		return true;
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	/* Dell RS690 only seems to work with MSIs. */
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	if ((rdev->pdev->device == 0x791f) &&
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	    (rdev->pdev->subsystem_vendor == 0x1028) &&
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	    (rdev->pdev->subsystem_device == 0x01fc))
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		return true;
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	/* Dell RS690 only seems to work with MSIs. */
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	if ((rdev->pdev->device == 0x791f) &&
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	    (rdev->pdev->subsystem_vendor == 0x1028) &&
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	    (rdev->pdev->subsystem_device == 0x01fd))
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		return true;
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	/* Gateway RS690 only seems to work with MSIs. */
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	if ((rdev->pdev->device == 0x791f) &&
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	    (rdev->pdev->subsystem_vendor == 0x107b) &&
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	    (rdev->pdev->subsystem_device == 0x0185))
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		return true;
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	/* try and enable MSIs by default on all RS690s */
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	if (rdev->family == CHIP_RS690)
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		return true;
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	/* RV515 seems to have MSI issues where it loses
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	 * MSI rearms occasionally. This leads to lockups and freezes.
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	 * disable it by default.
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	 */
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	if (rdev->family == CHIP_RV515)
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		return false;
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	if (rdev->flags & RADEON_IS_IGP) {
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		/* APUs work fine with MSIs */
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		if (rdev->family >= CHIP_PALM)
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			return true;
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		/* lots of IGPs have problems with MSIs */
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		return false;
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	}
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	return true;
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}
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/**
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 * radeon_irq_kms_init - init driver interrupt info
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 *
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 * @rdev: radeon device pointer
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 *
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 * Sets up the work irq handlers, vblank init, MSIs, etc. (all asics).
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 * Returns 0 for success, error for failure.
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 */
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int radeon_irq_kms_init(struct radeon_device *rdev)
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{
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	int r = 0;
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	spin_lock_init(&rdev->irq.lock);
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	/* Disable vblank irqs aggressively for power-saving */
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	rdev->ddev->vblank_disable_immediate = true;
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	r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
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	if (r) {
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		return r;
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	}
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	/* enable msi */
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	rdev->msi_enabled = 0;
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	if (radeon_msi_ok(rdev)) {
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		int ret = pci_enable_msi(rdev->pdev);
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		if (!ret) {
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			rdev->msi_enabled = 1;
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			dev_info(rdev->dev, "radeon: using MSI.\n");
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		}
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	}
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	INIT_DELAYED_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
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	INIT_WORK(&rdev->dp_work, radeon_dp_work_func);
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	INIT_WORK(&rdev->audio_work, r600_audio_update_hdmi);
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	rdev->irq.installed = true;
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	r = drm_irq_install(rdev->ddev, rdev->ddev->pdev->irq);
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	if (r) {
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		rdev->irq.installed = false;
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		flush_delayed_work(&rdev->hotplug_work);
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		return r;
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	}
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	DRM_INFO("radeon: irq initialized.\n");
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	return 0;
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}
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/**
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 * radeon_irq_kms_fini - tear down driver interrupt info
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 *
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 * @rdev: radeon device pointer
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 *
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 * Tears down the work irq handlers, vblank handlers, MSIs, etc. (all asics).
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 */
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void radeon_irq_kms_fini(struct radeon_device *rdev)
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{
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	if (rdev->irq.installed) {
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		drm_irq_uninstall(rdev->ddev);
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		rdev->irq.installed = false;
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		if (rdev->msi_enabled)
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			pci_disable_msi(rdev->pdev);
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		flush_delayed_work(&rdev->hotplug_work);
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	}
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}
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/**
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 * radeon_irq_kms_sw_irq_get - enable software interrupt
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 *
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 * @rdev: radeon device pointer
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 * @ring: ring whose interrupt you want to enable
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 *
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 * Enables the software interrupt for a specific ring (all asics).
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 * The software interrupt is generally used to signal a fence on
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 * a particular ring.
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 */
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void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring)
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{
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	unsigned long irqflags;
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	if (!rdev->ddev->irq_enabled)
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		return;
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	if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) {
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		spin_lock_irqsave(&rdev->irq.lock, irqflags);
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		radeon_irq_set(rdev);
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		spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
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	}
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}
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/**
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 * radeon_irq_kms_sw_irq_get_delayed - enable software interrupt
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 *
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 * @rdev: radeon device pointer
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 * @ring: ring whose interrupt you want to enable
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 *
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 * Enables the software interrupt for a specific ring (all asics).
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 * The software interrupt is generally used to signal a fence on
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 * a particular ring.
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 */
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bool radeon_irq_kms_sw_irq_get_delayed(struct radeon_device *rdev, int ring)
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{
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	return atomic_inc_return(&rdev->irq.ring_int[ring]) == 1;
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}
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/**
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 * radeon_irq_kms_sw_irq_put - disable software interrupt
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 *
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 * @rdev: radeon device pointer
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 * @ring: ring whose interrupt you want to disable
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 *
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 * Disables the software interrupt for a specific ring (all asics).
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 * The software interrupt is generally used to signal a fence on
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 * a particular ring.
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 */
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void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring)
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{
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	unsigned long irqflags;
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	if (!rdev->ddev->irq_enabled)
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		return;
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	if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) {
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		spin_lock_irqsave(&rdev->irq.lock, irqflags);
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		radeon_irq_set(rdev);
 | 
						|
		spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 | 
						|
	}
 | 
						|
}
 | 
						|
 | 
						|
/**
 | 
						|
 * radeon_irq_kms_pflip_irq_get - enable pageflip interrupt
 | 
						|
 *
 | 
						|
 * @rdev: radeon device pointer
 | 
						|
 * @crtc: crtc whose interrupt you want to enable
 | 
						|
 *
 | 
						|
 * Enables the pageflip interrupt for a specific crtc (all asics).
 | 
						|
 * For pageflips we use the vblank interrupt source.
 | 
						|
 */
 | 
						|
void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
 | 
						|
{
 | 
						|
	unsigned long irqflags;
 | 
						|
 | 
						|
	if (crtc < 0 || crtc >= rdev->num_crtc)
 | 
						|
		return;
 | 
						|
 | 
						|
	if (!rdev->ddev->irq_enabled)
 | 
						|
		return;
 | 
						|
 | 
						|
	if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) {
 | 
						|
		spin_lock_irqsave(&rdev->irq.lock, irqflags);
 | 
						|
		radeon_irq_set(rdev);
 | 
						|
		spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 | 
						|
	}
 | 
						|
}
 | 
						|
 | 
						|
/**
 | 
						|
 * radeon_irq_kms_pflip_irq_put - disable pageflip interrupt
 | 
						|
 *
 | 
						|
 * @rdev: radeon device pointer
 | 
						|
 * @crtc: crtc whose interrupt you want to disable
 | 
						|
 *
 | 
						|
 * Disables the pageflip interrupt for a specific crtc (all asics).
 | 
						|
 * For pageflips we use the vblank interrupt source.
 | 
						|
 */
 | 
						|
void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
 | 
						|
{
 | 
						|
	unsigned long irqflags;
 | 
						|
 | 
						|
	if (crtc < 0 || crtc >= rdev->num_crtc)
 | 
						|
		return;
 | 
						|
 | 
						|
	if (!rdev->ddev->irq_enabled)
 | 
						|
		return;
 | 
						|
 | 
						|
	if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) {
 | 
						|
		spin_lock_irqsave(&rdev->irq.lock, irqflags);
 | 
						|
		radeon_irq_set(rdev);
 | 
						|
		spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 | 
						|
	}
 | 
						|
}
 | 
						|
 | 
						|
/**
 | 
						|
 * radeon_irq_kms_enable_afmt - enable audio format change interrupt
 | 
						|
 *
 | 
						|
 * @rdev: radeon device pointer
 | 
						|
 * @block: afmt block whose interrupt you want to enable
 | 
						|
 *
 | 
						|
 * Enables the afmt change interrupt for a specific afmt block (all asics).
 | 
						|
 */
 | 
						|
void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block)
 | 
						|
{
 | 
						|
	unsigned long irqflags;
 | 
						|
 | 
						|
	if (!rdev->ddev->irq_enabled)
 | 
						|
		return;
 | 
						|
 | 
						|
	spin_lock_irqsave(&rdev->irq.lock, irqflags);
 | 
						|
	rdev->irq.afmt[block] = true;
 | 
						|
	radeon_irq_set(rdev);
 | 
						|
	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 | 
						|
 | 
						|
}
 | 
						|
 | 
						|
/**
 | 
						|
 * radeon_irq_kms_disable_afmt - disable audio format change interrupt
 | 
						|
 *
 | 
						|
 * @rdev: radeon device pointer
 | 
						|
 * @block: afmt block whose interrupt you want to disable
 | 
						|
 *
 | 
						|
 * Disables the afmt change interrupt for a specific afmt block (all asics).
 | 
						|
 */
 | 
						|
void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block)
 | 
						|
{
 | 
						|
	unsigned long irqflags;
 | 
						|
 | 
						|
	if (!rdev->ddev->irq_enabled)
 | 
						|
		return;
 | 
						|
 | 
						|
	spin_lock_irqsave(&rdev->irq.lock, irqflags);
 | 
						|
	rdev->irq.afmt[block] = false;
 | 
						|
	radeon_irq_set(rdev);
 | 
						|
	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 | 
						|
}
 | 
						|
 | 
						|
/**
 | 
						|
 * radeon_irq_kms_enable_hpd - enable hotplug detect interrupt
 | 
						|
 *
 | 
						|
 * @rdev: radeon device pointer
 | 
						|
 * @hpd_mask: mask of hpd pins you want to enable.
 | 
						|
 *
 | 
						|
 * Enables the hotplug detect interrupt for a specific hpd pin (all asics).
 | 
						|
 */
 | 
						|
void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
 | 
						|
{
 | 
						|
	unsigned long irqflags;
 | 
						|
	int i;
 | 
						|
 | 
						|
	if (!rdev->ddev->irq_enabled)
 | 
						|
		return;
 | 
						|
 | 
						|
	spin_lock_irqsave(&rdev->irq.lock, irqflags);
 | 
						|
	for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
 | 
						|
		rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i));
 | 
						|
	radeon_irq_set(rdev);
 | 
						|
	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 | 
						|
}
 | 
						|
 | 
						|
/**
 | 
						|
 * radeon_irq_kms_disable_hpd - disable hotplug detect interrupt
 | 
						|
 *
 | 
						|
 * @rdev: radeon device pointer
 | 
						|
 * @hpd_mask: mask of hpd pins you want to disable.
 | 
						|
 *
 | 
						|
 * Disables the hotplug detect interrupt for a specific hpd pin (all asics).
 | 
						|
 */
 | 
						|
void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
 | 
						|
{
 | 
						|
	unsigned long irqflags;
 | 
						|
	int i;
 | 
						|
 | 
						|
	if (!rdev->ddev->irq_enabled)
 | 
						|
		return;
 | 
						|
 | 
						|
	spin_lock_irqsave(&rdev->irq.lock, irqflags);
 | 
						|
	for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
 | 
						|
		rdev->irq.hpd[i] &= !(hpd_mask & (1 << i));
 | 
						|
	radeon_irq_set(rdev);
 | 
						|
	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 | 
						|
}
 | 
						|
 | 
						|
/**
 | 
						|
 * radeon_irq_kms_update_int_n - helper for updating interrupt enable registers
 | 
						|
 *
 | 
						|
 * @rdev: radeon device pointer
 | 
						|
 * @reg: the register to write to enable/disable interrupts
 | 
						|
 * @mask: the mask that enables the interrupts
 | 
						|
 * @enable: whether to enable or disable the interrupt register
 | 
						|
 * @name: the name of the interrupt register to print to the kernel log
 | 
						|
 * @num: the number of the interrupt register to print to the kernel log
 | 
						|
 *
 | 
						|
 * Helper for updating the enable state of interrupt registers. Checks whether
 | 
						|
 * or not the interrupt matches the enable state we want. If it doesn't, then
 | 
						|
 * we update it and print a debugging message to the kernel log indicating the
 | 
						|
 * new state of the interrupt register.
 | 
						|
 *
 | 
						|
 * Used for updating sequences of interrupts registers like HPD1, HPD2, etc.
 | 
						|
 */
 | 
						|
void radeon_irq_kms_set_irq_n_enabled(struct radeon_device *rdev,
 | 
						|
				      u32 reg, u32 mask,
 | 
						|
				      bool enable, const char *name, unsigned n)
 | 
						|
{
 | 
						|
	u32 tmp = RREG32(reg);
 | 
						|
 | 
						|
	/* Interrupt state didn't change */
 | 
						|
	if (!!(tmp & mask) == enable)
 | 
						|
		return;
 | 
						|
 | 
						|
	if (enable) {
 | 
						|
		DRM_DEBUG("%s%d interrupts enabled\n", name, n);
 | 
						|
		WREG32(reg, tmp |= mask);
 | 
						|
	} else {
 | 
						|
		DRM_DEBUG("%s%d interrupts disabled\n", name, n);
 | 
						|
		WREG32(reg, tmp & ~mask);
 | 
						|
	}
 | 
						|
}
 |