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	The driver doesn't have a struct of_device_id table but supported devices are registered via Device Trees. This is working on the assumption that a I2C device registered via OF will always match a legacy I2C device ID and that the MODALIAS reported will always be of the form i2c:<device>. But this could change in the future so the correct approach is to have an OF device ID table if the devices are registered via OF. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Mark Brown <broonie@kernel.org>
		
			
				
	
	
		
			360 lines
		
	
	
	
		
			8.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			360 lines
		
	
	
	
		
			8.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * NXP SC18IS602/603 SPI driver
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 *
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 * Copyright (C) Guenter Roeck <linux@roeck-us.net>
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 */
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#include <linux/kernel.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/spi/spi.h>
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#include <linux/i2c.h>
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#include <linux/delay.h>
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#include <linux/pm_runtime.h>
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#include <linux/of_device.h>
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#include <linux/of.h>
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#include <linux/platform_data/sc18is602.h>
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#include <linux/gpio/consumer.h>
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enum chips { sc18is602, sc18is602b, sc18is603 };
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#define SC18IS602_BUFSIZ		200
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#define SC18IS602_CLOCK			7372000
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#define SC18IS602_MODE_CPHA		BIT(2)
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#define SC18IS602_MODE_CPOL		BIT(3)
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#define SC18IS602_MODE_LSB_FIRST	BIT(5)
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#define SC18IS602_MODE_CLOCK_DIV_4	0x0
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#define SC18IS602_MODE_CLOCK_DIV_16	0x1
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#define SC18IS602_MODE_CLOCK_DIV_64	0x2
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#define SC18IS602_MODE_CLOCK_DIV_128	0x3
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struct sc18is602 {
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	struct spi_master	*master;
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	struct device		*dev;
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	u8			ctrl;
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	u32			freq;
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	u32			speed;
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	/* I2C data */
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	struct i2c_client	*client;
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	enum chips		id;
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	u8			buffer[SC18IS602_BUFSIZ + 1];
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	int			tlen;	/* Data queued for tx in buffer */
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	int			rindex;	/* Receive data index in buffer */
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	struct gpio_desc	*reset;
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};
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static int sc18is602_wait_ready(struct sc18is602 *hw, int len)
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{
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	int i, err;
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	int usecs = 1000000 * len / hw->speed + 1;
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	u8 dummy[1];
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	for (i = 0; i < 10; i++) {
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		err = i2c_master_recv(hw->client, dummy, 1);
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		if (err >= 0)
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			return 0;
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		usleep_range(usecs, usecs * 2);
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	}
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	return -ETIMEDOUT;
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}
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static int sc18is602_txrx(struct sc18is602 *hw, struct spi_message *msg,
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			  struct spi_transfer *t, bool do_transfer)
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{
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	unsigned int len = t->len;
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	int ret;
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	if (hw->tlen == 0) {
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		/* First byte (I2C command) is chip select */
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		hw->buffer[0] = 1 << msg->spi->chip_select;
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		hw->tlen = 1;
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		hw->rindex = 0;
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	}
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	/*
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	 * We can not immediately send data to the chip, since each I2C message
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	 * resembles a full SPI message (from CS active to CS inactive).
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	 * Enqueue messages up to the first read or until do_transfer is true.
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	 */
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	if (t->tx_buf) {
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		memcpy(&hw->buffer[hw->tlen], t->tx_buf, len);
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		hw->tlen += len;
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		if (t->rx_buf)
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			do_transfer = true;
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		else
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			hw->rindex = hw->tlen - 1;
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	} else if (t->rx_buf) {
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		/*
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		 * For receive-only transfers we still need to perform a dummy
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		 * write to receive data from the SPI chip.
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		 * Read data starts at the end of transmit data (minus 1 to
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		 * account for CS).
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		 */
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		hw->rindex = hw->tlen - 1;
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		memset(&hw->buffer[hw->tlen], 0, len);
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		hw->tlen += len;
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		do_transfer = true;
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	}
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	if (do_transfer && hw->tlen > 1) {
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		ret = sc18is602_wait_ready(hw, SC18IS602_BUFSIZ);
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		if (ret < 0)
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			return ret;
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		ret = i2c_master_send(hw->client, hw->buffer, hw->tlen);
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		if (ret < 0)
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			return ret;
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		if (ret != hw->tlen)
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			return -EIO;
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		if (t->rx_buf) {
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			int rlen = hw->rindex + len;
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			ret = sc18is602_wait_ready(hw, hw->tlen);
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			if (ret < 0)
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				return ret;
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			ret = i2c_master_recv(hw->client, hw->buffer, rlen);
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			if (ret < 0)
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				return ret;
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			if (ret != rlen)
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				return -EIO;
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			memcpy(t->rx_buf, &hw->buffer[hw->rindex], len);
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		}
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		hw->tlen = 0;
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	}
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	return len;
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}
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static int sc18is602_setup_transfer(struct sc18is602 *hw, u32 hz, u8 mode)
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{
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	u8 ctrl = 0;
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	int ret;
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	if (mode & SPI_CPHA)
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		ctrl |= SC18IS602_MODE_CPHA;
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	if (mode & SPI_CPOL)
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		ctrl |= SC18IS602_MODE_CPOL;
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	if (mode & SPI_LSB_FIRST)
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		ctrl |= SC18IS602_MODE_LSB_FIRST;
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	/* Find the closest clock speed */
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	if (hz >= hw->freq / 4) {
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		ctrl |= SC18IS602_MODE_CLOCK_DIV_4;
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		hw->speed = hw->freq / 4;
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	} else if (hz >= hw->freq / 16) {
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		ctrl |= SC18IS602_MODE_CLOCK_DIV_16;
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		hw->speed = hw->freq / 16;
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	} else if (hz >= hw->freq / 64) {
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		ctrl |= SC18IS602_MODE_CLOCK_DIV_64;
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		hw->speed = hw->freq / 64;
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	} else {
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		ctrl |= SC18IS602_MODE_CLOCK_DIV_128;
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		hw->speed = hw->freq / 128;
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	}
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	/*
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	 * Don't do anything if the control value did not change. The initial
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	 * value of 0xff for hw->ctrl ensures that the correct mode will be set
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	 * with the first call to this function.
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	 */
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	if (ctrl == hw->ctrl)
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		return 0;
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	ret = i2c_smbus_write_byte_data(hw->client, 0xf0, ctrl);
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	if (ret < 0)
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		return ret;
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	hw->ctrl = ctrl;
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	return 0;
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}
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static int sc18is602_check_transfer(struct spi_device *spi,
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				    struct spi_transfer *t, int tlen)
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{
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	if (t && t->len + tlen > SC18IS602_BUFSIZ)
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		return -EINVAL;
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	return 0;
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}
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static int sc18is602_transfer_one(struct spi_master *master,
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				  struct spi_message *m)
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{
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	struct sc18is602 *hw = spi_master_get_devdata(master);
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	struct spi_device *spi = m->spi;
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	struct spi_transfer *t;
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	int status = 0;
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	hw->tlen = 0;
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	list_for_each_entry(t, &m->transfers, transfer_list) {
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		bool do_transfer;
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		status = sc18is602_check_transfer(spi, t, hw->tlen);
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		if (status < 0)
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			break;
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		status = sc18is602_setup_transfer(hw, t->speed_hz, spi->mode);
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		if (status < 0)
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			break;
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		do_transfer = t->cs_change || list_is_last(&t->transfer_list,
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							   &m->transfers);
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		if (t->len) {
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			status = sc18is602_txrx(hw, m, t, do_transfer);
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			if (status < 0)
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				break;
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			m->actual_length += status;
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		}
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		status = 0;
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		if (t->delay_usecs)
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			udelay(t->delay_usecs);
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	}
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	m->status = status;
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	spi_finalize_current_message(master);
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	return status;
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}
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static int sc18is602_setup(struct spi_device *spi)
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{
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	struct sc18is602 *hw = spi_master_get_devdata(spi->master);
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	/* SC18IS602 does not support CS2 */
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	if (hw->id == sc18is602 && spi->chip_select == 2)
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		return -ENXIO;
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	return 0;
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}
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static int sc18is602_probe(struct i2c_client *client,
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			   const struct i2c_device_id *id)
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{
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	struct device *dev = &client->dev;
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	struct device_node *np = dev->of_node;
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	struct sc18is602_platform_data *pdata = dev_get_platdata(dev);
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	struct sc18is602 *hw;
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	struct spi_master *master;
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	int error;
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	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C |
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				     I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
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		return -EINVAL;
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	master = spi_alloc_master(dev, sizeof(struct sc18is602));
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	if (!master)
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		return -ENOMEM;
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	hw = spi_master_get_devdata(master);
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	i2c_set_clientdata(client, hw);
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	/* assert reset and then release */
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	hw->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
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	if (IS_ERR(hw->reset))
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		return PTR_ERR(hw->reset);
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	gpiod_set_value_cansleep(hw->reset, 0);
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	hw->master = master;
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	hw->client = client;
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	hw->dev = dev;
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	hw->ctrl = 0xff;
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	if (client->dev.of_node)
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		hw->id = (enum chips)of_device_get_match_data(&client->dev);
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	else
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		hw->id = id->driver_data;
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	switch (hw->id) {
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	case sc18is602:
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	case sc18is602b:
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		master->num_chipselect = 4;
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		hw->freq = SC18IS602_CLOCK;
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		break;
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	case sc18is603:
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		master->num_chipselect = 2;
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		if (pdata) {
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			hw->freq = pdata->clock_frequency;
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		} else {
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			const __be32 *val;
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			int len;
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			val = of_get_property(np, "clock-frequency", &len);
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			if (val && len >= sizeof(__be32))
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				hw->freq = be32_to_cpup(val);
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		}
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		if (!hw->freq)
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			hw->freq = SC18IS602_CLOCK;
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		break;
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	}
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	master->bus_num = np ? -1 : client->adapter->nr;
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	master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_LSB_FIRST;
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	master->bits_per_word_mask = SPI_BPW_MASK(8);
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	master->setup = sc18is602_setup;
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	master->transfer_one_message = sc18is602_transfer_one;
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	master->dev.of_node = np;
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	master->min_speed_hz = hw->freq / 128;
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	master->max_speed_hz = hw->freq / 4;
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	error = devm_spi_register_master(dev, master);
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	if (error)
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		goto error_reg;
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	return 0;
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error_reg:
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	spi_master_put(master);
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	return error;
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}
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static const struct i2c_device_id sc18is602_id[] = {
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	{ "sc18is602", sc18is602 },
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	{ "sc18is602b", sc18is602b },
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	{ "sc18is603", sc18is603 },
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	{ }
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};
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MODULE_DEVICE_TABLE(i2c, sc18is602_id);
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static const struct of_device_id sc18is602_of_match[] = {
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	{
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		.compatible = "nxp,sc18is602",
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		.data = (void *)sc18is602
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	},
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	{
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		.compatible = "nxp,sc18is602b",
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		.data = (void *)sc18is602b
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	},
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	{
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		.compatible = "nxp,sc18is603",
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		.data = (void *)sc18is603
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	},
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	{ },
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};
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MODULE_DEVICE_TABLE(of, sc18is602_of_match);
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static struct i2c_driver sc18is602_driver = {
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	.driver = {
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		.name = "sc18is602",
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		.of_match_table = of_match_ptr(sc18is602_of_match),
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	},
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	.probe = sc18is602_probe,
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	.id_table = sc18is602_id,
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};
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module_i2c_driver(sc18is602_driver);
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MODULE_DESCRIPTION("SC18IC602/603 SPI Master Driver");
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MODULE_AUTHOR("Guenter Roeck");
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MODULE_LICENSE("GPL");
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