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8bcde6582c
XO is onchip buffer clock to generate 19.2MHz. This patch adds support to 5 XO buffer clocks found on PMIC8921, these buffer clocks can be controlled from external pin or in manual mode. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
127 lines
3.8 KiB
C
127 lines
3.8 KiB
C
/*
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* Copyright 2015 Linaro Limited
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _DT_BINDINGS_CLK_MSM_RPMCC_H
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#define _DT_BINDINGS_CLK_MSM_RPMCC_H
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/* RPM clocks */
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#define RPM_PXO_CLK 0
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#define RPM_PXO_A_CLK 1
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#define RPM_CXO_CLK 2
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#define RPM_CXO_A_CLK 3
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#define RPM_APPS_FABRIC_CLK 4
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#define RPM_APPS_FABRIC_A_CLK 5
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#define RPM_CFPB_CLK 6
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#define RPM_CFPB_A_CLK 7
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#define RPM_QDSS_CLK 8
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#define RPM_QDSS_A_CLK 9
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#define RPM_DAYTONA_FABRIC_CLK 10
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#define RPM_DAYTONA_FABRIC_A_CLK 11
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#define RPM_EBI1_CLK 12
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#define RPM_EBI1_A_CLK 13
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#define RPM_MM_FABRIC_CLK 14
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#define RPM_MM_FABRIC_A_CLK 15
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#define RPM_MMFPB_CLK 16
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#define RPM_MMFPB_A_CLK 17
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#define RPM_SYS_FABRIC_CLK 18
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#define RPM_SYS_FABRIC_A_CLK 19
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#define RPM_SFPB_CLK 20
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#define RPM_SFPB_A_CLK 21
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#define RPM_SMI_CLK 22
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#define RPM_SMI_A_CLK 23
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#define RPM_PLL4_CLK 24
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#define RPM_XO_D0 25
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#define RPM_XO_D1 26
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#define RPM_XO_A0 27
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#define RPM_XO_A1 28
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#define RPM_XO_A2 29
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/* SMD RPM clocks */
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#define RPM_SMD_XO_CLK_SRC 0
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#define RPM_SMD_XO_A_CLK_SRC 1
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#define RPM_SMD_PCNOC_CLK 2
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#define RPM_SMD_PCNOC_A_CLK 3
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#define RPM_SMD_SNOC_CLK 4
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#define RPM_SMD_SNOC_A_CLK 5
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#define RPM_SMD_BIMC_CLK 6
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#define RPM_SMD_BIMC_A_CLK 7
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#define RPM_SMD_QDSS_CLK 8
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#define RPM_SMD_QDSS_A_CLK 9
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#define RPM_SMD_BB_CLK1 10
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#define RPM_SMD_BB_CLK1_A 11
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#define RPM_SMD_BB_CLK2 12
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#define RPM_SMD_BB_CLK2_A 13
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#define RPM_SMD_RF_CLK1 14
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#define RPM_SMD_RF_CLK1_A 15
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#define RPM_SMD_RF_CLK2 16
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#define RPM_SMD_RF_CLK2_A 17
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#define RPM_SMD_BB_CLK1_PIN 18
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#define RPM_SMD_BB_CLK1_A_PIN 19
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#define RPM_SMD_BB_CLK2_PIN 20
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#define RPM_SMD_BB_CLK2_A_PIN 21
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#define RPM_SMD_RF_CLK1_PIN 22
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#define RPM_SMD_RF_CLK1_A_PIN 23
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#define RPM_SMD_RF_CLK2_PIN 24
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#define RPM_SMD_RF_CLK2_A_PIN 25
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#define RPM_SMD_PNOC_CLK 26
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#define RPM_SMD_PNOC_A_CLK 27
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#define RPM_SMD_CNOC_CLK 28
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#define RPM_SMD_CNOC_A_CLK 29
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#define RPM_SMD_MMSSNOC_AHB_CLK 30
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#define RPM_SMD_MMSSNOC_AHB_A_CLK 31
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#define RPM_SMD_GFX3D_CLK_SRC 32
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#define RPM_SMD_GFX3D_A_CLK_SRC 33
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#define RPM_SMD_OCMEMGX_CLK 34
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#define RPM_SMD_OCMEMGX_A_CLK 35
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#define RPM_SMD_CXO_D0 36
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#define RPM_SMD_CXO_D0_A 37
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#define RPM_SMD_CXO_D1 38
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#define RPM_SMD_CXO_D1_A 39
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#define RPM_SMD_CXO_A0 40
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#define RPM_SMD_CXO_A0_A 41
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#define RPM_SMD_CXO_A1 42
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#define RPM_SMD_CXO_A1_A 43
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#define RPM_SMD_CXO_A2 44
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#define RPM_SMD_CXO_A2_A 45
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#define RPM_SMD_DIV_CLK1 46
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#define RPM_SMD_DIV_A_CLK1 47
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#define RPM_SMD_DIV_CLK2 48
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#define RPM_SMD_DIV_A_CLK2 49
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#define RPM_SMD_DIFF_CLK 50
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#define RPM_SMD_DIFF_A_CLK 51
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#define RPM_SMD_CXO_D0_PIN 52
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#define RPM_SMD_CXO_D0_A_PIN 53
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#define RPM_SMD_CXO_D1_PIN 54
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#define RPM_SMD_CXO_D1_A_PIN 55
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#define RPM_SMD_CXO_A0_PIN 56
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#define RPM_SMD_CXO_A0_A_PIN 57
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#define RPM_SMD_CXO_A1_PIN 58
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#define RPM_SMD_CXO_A1_A_PIN 59
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#define RPM_SMD_CXO_A2_PIN 60
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#define RPM_SMD_CXO_A2_A_PIN 61
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#define RPM_SMD_AGGR1_NOC_CLK 62
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#define RPM_SMD_AGGR1_NOC_A_CLK 63
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#define RPM_SMD_AGGR2_NOC_CLK 64
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#define RPM_SMD_AGGR2_NOC_A_CLK 65
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#define RPM_SMD_MMAXI_CLK 66
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#define RPM_SMD_MMAXI_A_CLK 67
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#define RPM_SMD_IPA_CLK 68
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#define RPM_SMD_IPA_A_CLK 69
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#define RPM_SMD_CE1_CLK 70
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#define RPM_SMD_CE1_A_CLK 71
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#define RPM_SMD_DIV_CLK3 72
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#define RPM_SMD_DIV_A_CLK3 73
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#define RPM_SMD_LN_BB_CLK 74
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#define RPM_SMD_LN_BB_A_CLK 75
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#endif
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