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	The struct cs4349_platform_data should be defined in a public header in include/sound/ rather than in sound/soc/codecs folder. In additional, the platform data support is not properly handled in this driver so remove it now. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@kernel.org>
		
			
				
	
	
		
			136 lines
		
	
	
	
		
			3.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			136 lines
		
	
	
	
		
			3.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * ALSA SoC CS4349 codec driver
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 *
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 * Copyright 2015 Cirrus Logic, Inc.
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 *
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 * Author: Tim Howe <Tim.Howe@cirrus.com>
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 *
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 * This program is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU General Public License
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 * version 2 as published by the Free Software Foundation.
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 *
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 * This program is distributed in the hope that it will be useful, but
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 * WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * General Public License for more details.
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 *
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 */
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#ifndef __CS4349_H__
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#define __CS4349_H__
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/* CS4349 registers addresses */
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#define CS4349_CHIPID		0x01	/* Device and Rev ID, Read Only */
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#define CS4349_MODE		0x02	/* Mode Control */
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#define CS4349_VMI		0x03	/* Volume, Mixing, Inversion Control */
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#define CS4349_MUTE		0x04	/* Mute Control */
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#define CS4349_VOLA		0x05	/* DAC Channel A Volume Control */
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#define CS4349_VOLB		0x06	/* DAC Channel B Volume Control */
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#define CS4349_RMPFLT		0x07	/* Ramp and Filter Control */
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#define CS4349_MISC		0x08	/* Power Down,Freeze Control,Pop Stop*/
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#define CS4349_I2C_INCR		0x80
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/* Device and Revision ID */
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#define CS4349_REVA		0xF0	/* Rev A */
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#define CS4349_REVB		0xF1	/* Rev B */
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#define CS4349_REVC2		0xFF	/* Rev C2 */
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/* PDN_DONE Poll Maximum
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 * If soft ramp is set it will take much longer to power down
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 * the system.
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 */
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#define PDN_POLL_MAX		900
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/* Bitfield Definitions */
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/* CS4349_MODE */
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/* (Digital Interface Format, De-Emphasis Control, Functional Mode */
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#define DIF2			(1 << 6)
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#define DIF1			(1 << 5)
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#define DIF0			(1 << 4)
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#define DEM1			(1 << 3)
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#define DEM0			(1 << 2)
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#define FM1			(1 << 1)
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#define DIF_LEFT_JST		0x00
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#define DIF_I2S			0x01
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#define DIF_RGHT_JST16		0x02
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#define DIF_RGHT_JST24		0x03
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#define DIF_TDM0		0x04
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#define DIF_TDM1		0x05
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#define DIF_TDM2		0x06
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#define DIF_TDM3		0x07
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#define DIF_MASK		0x70
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#define MODE_FORMAT(x)		(((x)&7)<<4)
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#define DEM_MASK		0x0C
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#define NO_DEM			0x00
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#define DEM_441			0x04
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#define DEM_48K			0x08
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#define DEM_32K			0x0C
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#define FM_AUTO			0x00
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#define FM_SNGL			0x01
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#define FM_DBL			0x02
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#define FM_QUAD			0x03
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#define FM_SNGL_MIN		30000
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#define FM_SNGL_MAX		54000
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#define FM_DBL_MAX		108000
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#define FM_QUAD_MAX		216000
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#define FM_MASK			0x03
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/* CS4349_VMI (VMI = Volume, Mixing and Inversion Controls) */
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#define VOLBISA			(1 << 7)
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#define VOLAISB			(1 << 7)
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/* INVERT_A only available for Left Jstfd, Right Jstfd16 and Right Jstfd24 */
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#define INVERT_A		(1 << 6)
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/* INVERT_B only available for Left Jstfd, Right Jstfd16 and Right Jstfd24 */
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#define INVERT_B		(1 << 5)
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#define ATAPI3			(1 << 3)
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#define ATAPI2			(1 << 2)
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#define ATAPI1			(1 << 1)
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#define ATAPI0			(1 << 0)
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#define MUTEAB			0x00
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#define MUTEA_RIGHTB		0x01
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#define MUTEA_LEFTB		0x02
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#define MUTEA_SUMLRDIV2B	0x03
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#define RIGHTA_MUTEB		0x04
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#define RIGHTA_RIGHTB		0x05
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#define RIGHTA_LEFTB		0x06
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#define RIGHTA_SUMLRDIV2B	0x07
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#define LEFTA_MUTEB		0x08
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#define LEFTA_RIGHTB		0x09	/* Default */
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#define LEFTA_LEFTB		0x0A
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#define LEFTA_SUMLRDIV2B	0x0B
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#define SUMLRDIV2A_MUTEB	0x0C
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#define SUMLRDIV2A_RIGHTB	0x0D
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#define SUMLRDIV2A_LEFTB	0x0E
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#define SUMLRDIV2_AB		0x0F
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#define CHMIX_MASK		0x0F
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/* CS4349_MUTE */
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#define AUTOMUTE		(1 << 7)
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#define MUTEC_AB		(1 << 5)
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#define MUTE_A			(1 << 4)
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#define MUTE_B			(1 << 3)
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#define MUTE_AB_MASK		0x18
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/* CS4349_RMPFLT (Ramp and Filter Control) */
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#define SCZ1			(1 << 7)
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#define SCZ0			(1 << 6)
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#define RMP_UP			(1 << 5)
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#define RMP_DN			(1 << 4)
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#define FILT_SEL		(1 << 2)
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#define IMMDT_CHNG		0x31
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#define ZEROCRSS		0x71
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#define SOFT_RMP		0xB1
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#define SFTRMP_ZEROCRSS		0xF1
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#define SR_ZC_MASK		0xC0
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/* CS4349_MISC */
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#define PWR_DWN			(1 << 7)
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#define FREEZE			(1 << 5)
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#define POPG_EN			(1 << 4)
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#endif	/* __CS4349_H__ */
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