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This patch includes virtual memory layout, PHYS_OFFSET is defined as 0x0. It also includes the 4KB/8KB page size configurations and pte operations. Signed-off-by: Vincent Chen <vincentc@andestech.com> Signed-off-by: Greentime Hu <greentime@andestech.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
19 lines
459 B
C
19 lines
459 B
C
// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2005-2017 Andes Technology Corporation
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#ifndef _ASMNDS32_SHMPARAM_H
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#define _ASMNDS32_SHMPARAM_H
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/*
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* This should be the size of the virtually indexed cache/ways,
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* whichever is greater since the cache aliases every size/ways
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* bytes.
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*/
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#define SHMLBA (4 * SZ_8K) /* attach addr a multiple of this */
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/*
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* Enforce SHMLBA in shmat
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*/
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#define __ARCH_FORCE_SHMLBA
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#endif /* _ASMNDS32_SHMPARAM_H */
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