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ffb92ce826
Patch series "Fixes for ARCH=hexagon allmodconfig", v2.
This series fixes some issues noticed with ARCH=hexagon allmodconfig.
This patch (of 3):
When building ARCH=hexagon allmodconfig, the following errors occur:
ERROR: modpost: "__raw_readsl" [drivers/i3c/master/svc-i3c-master.ko] undefined!
ERROR: modpost: "__raw_writesl" [drivers/i3c/master/dw-i3c-master.ko] undefined!
ERROR: modpost: "__raw_readsl" [drivers/i3c/master/dw-i3c-master.ko] undefined!
ERROR: modpost: "__raw_writesl" [drivers/i3c/master/i3c-master-cdns.ko] undefined!
ERROR: modpost: "__raw_readsl" [drivers/i3c/master/i3c-master-cdns.ko] undefined!
Export these symbols so that modules can use them without any errors.
Link: https://lkml.kernel.org/r/20211115174250.1994179-1-nathan@kernel.org
Link: https://lkml.kernel.org/r/20211115174250.1994179-2-nathan@kernel.org
Fixes: 013bf24c38 ("Hexagon: Provide basic implementation and/or stubs for I/O routines.")
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Acked-by: Brian Cain <bcain@codeaurora.org>
Cc: Nick Desaulniers <ndesaulniers@google.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
82 lines
1.7 KiB
C
82 lines
1.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* I/O access functions for Hexagon
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*
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* Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
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*/
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#include <asm/io.h>
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/* These are all FIFO routines! */
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/*
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* __raw_readsw - read words a short at a time
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* @addr: source address
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* @data: data address
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* @len: number of shorts to read
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*/
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void __raw_readsw(const void __iomem *addr, void *data, int len)
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{
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const volatile short int *src = (short int *) addr;
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short int *dst = (short int *) data;
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if ((u32)data & 0x1)
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panic("unaligned pointer to readsw");
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while (len-- > 0)
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*dst++ = *src;
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}
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EXPORT_SYMBOL(__raw_readsw);
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/*
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* __raw_writesw - read words a short at a time
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* @addr: source address
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* @data: data address
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* @len: number of shorts to read
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*/
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void __raw_writesw(void __iomem *addr, const void *data, int len)
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{
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const short int *src = (short int *)data;
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volatile short int *dst = (short int *)addr;
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if ((u32)data & 0x1)
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panic("unaligned pointer to writesw");
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while (len-- > 0)
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*dst = *src++;
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}
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EXPORT_SYMBOL(__raw_writesw);
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/* Pretty sure len is pre-adjusted for the length of the access already */
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void __raw_readsl(const void __iomem *addr, void *data, int len)
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{
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const volatile long *src = (long *) addr;
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long *dst = (long *) data;
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if ((u32)data & 0x3)
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panic("unaligned pointer to readsl");
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while (len-- > 0)
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*dst++ = *src;
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}
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EXPORT_SYMBOL(__raw_readsl);
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void __raw_writesl(void __iomem *addr, const void *data, int len)
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{
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const long *src = (long *)data;
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volatile long *dst = (long *)addr;
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if ((u32)data & 0x3)
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panic("unaligned pointer to writesl");
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while (len-- > 0)
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*dst = *src++;
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}
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EXPORT_SYMBOL(__raw_writesl);
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