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fef532ea0c
rt2880_wdt.c uses (well, attempts to use) rt_sysc_membase. However,
when this watchdog driver is built as a loadable module, there is a
build error since the rt_sysc_membase symbol is not exported.
Export it to quell the build error.
ERROR: modpost: "rt_sysc_membase" [drivers/watchdog/rt2880_wdt.ko] undefined!
Fixes: 473cf939ff ("watchdog: add ralink watchdog driver")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Guenter Roeck <linux@roeck-us.net>
Cc: Wim Van Sebroeck <wim@iguana.be>
Cc: John Crispin <john@phrozen.org>
Cc: linux-mips@vger.kernel.org
Cc: linux-watchdog@vger.kernel.org
Acked-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
103 lines
2.3 KiB
C
103 lines
2.3 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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*
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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* Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2013 John Crispin <john@phrozen.org>
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*/
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#include <linux/io.h>
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#include <linux/clk.h>
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#include <linux/export.h>
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#include <linux/init.h>
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#include <linux/sizes.h>
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#include <linux/of_fdt.h>
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#include <linux/kernel.h>
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#include <linux/memblock.h>
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#include <linux/of_platform.h>
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#include <linux/of_address.h>
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#include <asm/reboot.h>
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#include <asm/bootinfo.h>
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#include <asm/addrspace.h>
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#include <asm/prom.h>
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#include "common.h"
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__iomem void *rt_sysc_membase;
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__iomem void *rt_memc_membase;
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EXPORT_SYMBOL_GPL(rt_sysc_membase);
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__iomem void *plat_of_remap_node(const char *node)
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{
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struct resource res;
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struct device_node *np;
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np = of_find_compatible_node(NULL, NULL, node);
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if (!np)
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panic("Failed to find %s node", node);
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if (of_address_to_resource(np, 0, &res))
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panic("Failed to get resource for %s", node);
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if (!request_mem_region(res.start,
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resource_size(&res),
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res.name))
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panic("Failed to request resources for %s", node);
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return ioremap(res.start, resource_size(&res));
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}
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void __init device_tree_init(void)
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{
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unflatten_and_copy_device_tree();
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}
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static int memory_dtb;
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static int __init early_init_dt_find_memory(unsigned long node,
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const char *uname, int depth, void *data)
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{
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if (depth == 1 && !strcmp(uname, "memory@0"))
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memory_dtb = 1;
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return 0;
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}
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void __init plat_mem_setup(void)
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{
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void *dtb;
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set_io_port_base(KSEG1);
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/*
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* Load the builtin devicetree. This causes the chosen node to be
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* parsed resulting in our memory appearing.
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*/
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dtb = get_fdt();
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__dt_setup_arch(dtb);
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of_scan_flat_dt(early_init_dt_find_memory, NULL);
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if (memory_dtb)
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of_scan_flat_dt(early_init_dt_scan_memory, NULL);
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else if (soc_info.mem_detect)
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soc_info.mem_detect();
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else if (soc_info.mem_size)
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memblock_add(soc_info.mem_base, soc_info.mem_size * SZ_1M);
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else
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detect_memory_region(soc_info.mem_base,
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soc_info.mem_size_min * SZ_1M,
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soc_info.mem_size_max * SZ_1M);
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}
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static int __init plat_of_setup(void)
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{
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__dt_register_buses(soc_info.compatible, "palmbus");
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/* make sure that the reset controller is setup early */
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ralink_rst_init();
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return 0;
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}
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arch_initcall(plat_of_setup);
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