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52102a3ba6
Move the soc device register code to drivers/soc/imx to align with i.MX8. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
72 lines
1.6 KiB
C
72 lines
1.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include "hardware.h"
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#include "common.h"
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unsigned int __mxc_cpu_type;
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static unsigned int imx_soc_revision;
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void mxc_set_cpu_type(unsigned int type)
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{
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__mxc_cpu_type = type;
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}
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void imx_set_soc_revision(unsigned int rev)
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{
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imx_soc_revision = rev;
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}
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unsigned int imx_get_soc_revision(void)
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{
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return imx_soc_revision;
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}
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void imx_print_silicon_rev(const char *cpu, int srev)
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{
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if (srev == IMX_CHIP_REVISION_UNKNOWN)
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pr_info("CPU identified as %s, unknown revision\n", cpu);
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else
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pr_info("CPU identified as %s, silicon rev %d.%d\n",
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cpu, (srev >> 4) & 0xf, srev & 0xf);
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}
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void __init imx_set_aips(void __iomem *base)
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{
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unsigned int reg;
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/*
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* Set all MPROTx to be non-bufferable, trusted for R/W,
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* not forced to user-mode.
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*/
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imx_writel(0x77777777, base + 0x0);
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imx_writel(0x77777777, base + 0x4);
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/*
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* Set all OPACRx to be non-bufferable, to not require
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* supervisor privilege level for access, allow for
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* write access and untrusted master access.
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*/
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imx_writel(0x0, base + 0x40);
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imx_writel(0x0, base + 0x44);
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imx_writel(0x0, base + 0x48);
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imx_writel(0x0, base + 0x4C);
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reg = imx_readl(base + 0x50) & 0x00FFFFFF;
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imx_writel(reg, base + 0x50);
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}
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void __init imx_aips_allow_unprivileged_access(
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const char *compat)
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{
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void __iomem *aips_base_addr;
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struct device_node *np;
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for_each_compatible_node(np, NULL, compat) {
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aips_base_addr = of_iomap(np, 0);
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WARN_ON(!aips_base_addr);
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imx_set_aips(aips_base_addr);
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}
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}
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