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281e3aea35
This is a MIPS32 Release 5 based IP core with XPA, EVA, dual/quad issue exec pipes, MMU with two-levels TLB, UCA, MSA, MDU core level features and system level features like up to six P5600 calculation cores, CM2 with L2 cache, IOCU/IOMMU (though might be unused depending on the system-specific IP core configuration), GIC, CPC, virtualisation module, eJTAG and PDtrace. As being MIPS32 Release 5 based core it provides all the features available by the CPU_MIPS32_R5 config, while adding a few more like UCA attribute support, availability of CPU-freq (by means of L2/CM clock ratio setting), EI/VI GIC modes detection at runtime. In addition to this if P5600 architecture is enabled modern GNU GCC provides a specific tuning for P5600 processors with respect to the classic MIPS32 Release 5. First of all branch-likely avoidance is activated only when the code is compiled with the speed optimization (avoidance is always enabled for the pure MIPS32 Release 5 architecture). Secondly the madd/msub avoidance is enabled since madd/msub utilization isn't profitable due to overhead of getting the result out of the HI/LO registers. Multiply-accumulate instructions are activated and utilized together with the necessary code reorder when multiply-add/multiply-subtract statements are met. Finally load/store bonding is activated by default. All of these optimizations may make the code relatively faster than if just MIP32 release 5 architecture was requested. Co-developed-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Signed-off-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Paul Burton <paulburton@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
86 lines
2.3 KiB
C
86 lines
2.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_MODULE_H
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#define _ASM_MODULE_H
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#include <linux/list.h>
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#include <linux/elf.h>
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#include <asm/extable.h>
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struct mod_arch_specific {
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/* Data Bus Error exception tables */
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struct list_head dbe_list;
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const struct exception_table_entry *dbe_start;
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const struct exception_table_entry *dbe_end;
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struct mips_hi16 *r_mips_hi16_list;
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};
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typedef uint8_t Elf64_Byte; /* Type for a 8-bit quantity. */
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typedef struct {
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Elf64_Addr r_offset; /* Address of relocation. */
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Elf64_Word r_sym; /* Symbol index. */
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Elf64_Byte r_ssym; /* Special symbol. */
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Elf64_Byte r_type3; /* Third relocation. */
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Elf64_Byte r_type2; /* Second relocation. */
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Elf64_Byte r_type; /* First relocation. */
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} Elf64_Mips_Rel;
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typedef struct {
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Elf64_Addr r_offset; /* Address of relocation. */
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Elf64_Word r_sym; /* Symbol index. */
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Elf64_Byte r_ssym; /* Special symbol. */
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Elf64_Byte r_type3; /* Third relocation. */
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Elf64_Byte r_type2; /* Second relocation. */
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Elf64_Byte r_type; /* First relocation. */
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Elf64_Sxword r_addend; /* Addend. */
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} Elf64_Mips_Rela;
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#ifdef CONFIG_32BIT
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#define Elf_Shdr Elf32_Shdr
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#define Elf_Sym Elf32_Sym
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#define Elf_Ehdr Elf32_Ehdr
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#define Elf_Addr Elf32_Addr
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#define Elf_Rel Elf32_Rel
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#define Elf_Rela Elf32_Rela
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#define ELF_R_TYPE(X) ELF32_R_TYPE(X)
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#define ELF_R_SYM(X) ELF32_R_SYM(X)
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#define Elf_Mips_Rel Elf32_Rel
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#define Elf_Mips_Rela Elf32_Rela
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#define ELF_MIPS_R_SYM(rel) ELF32_R_SYM((rel).r_info)
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#define ELF_MIPS_R_TYPE(rel) ELF32_R_TYPE((rel).r_info)
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#endif
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#ifdef CONFIG_64BIT
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#define Elf_Shdr Elf64_Shdr
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#define Elf_Sym Elf64_Sym
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#define Elf_Ehdr Elf64_Ehdr
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#define Elf_Addr Elf64_Addr
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#define Elf_Rel Elf64_Rel
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#define Elf_Rela Elf64_Rela
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#define ELF_R_TYPE(X) ELF64_R_TYPE(X)
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#define ELF_R_SYM(X) ELF64_R_SYM(X)
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#define Elf_Mips_Rel Elf64_Mips_Rel
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#define Elf_Mips_Rela Elf64_Mips_Rela
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#define ELF_MIPS_R_SYM(rel) ((rel).r_sym)
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#define ELF_MIPS_R_TYPE(rel) ((rel).r_type)
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#endif
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#ifdef CONFIG_MODULES
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/* Given an address, look for it in the exception tables. */
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const struct exception_table_entry*search_module_dbetables(unsigned long addr);
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#else
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/* Given an address, look for it in the exception tables. */
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static inline const struct exception_table_entry *
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search_module_dbetables(unsigned long addr)
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{
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return NULL;
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}
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#endif
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#endif /* _ASM_MODULE_H */
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