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The bad pages that need to be retired are not all allocated in the same poison consumption process, so an interface is needed to query the processes that allocate the bad pages. By killing all the processes that allocate the bad pages, the bad pages can be reserved immediately. Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
92 lines
2.8 KiB
C
92 lines
2.8 KiB
C
/* SPDX-License-Identifier: MIT
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* Copyright 2021 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef __AMDGPU_VRAM_MGR_H__
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#define __AMDGPU_VRAM_MGR_H__
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#include <drm/drm_buddy.h>
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struct amdgpu_vram_mgr {
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struct ttm_resource_manager manager;
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struct drm_buddy mm;
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/* protects access to buffer objects */
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struct mutex lock;
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struct list_head reservations_pending;
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struct list_head reserved_pages;
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atomic64_t vis_usage;
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u64 default_page_size;
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struct list_head allocated_vres_list;
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};
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struct amdgpu_vres_task {
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pid_t pid;
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char comm[TASK_COMM_LEN];
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};
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struct amdgpu_vram_block_info {
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u64 start;
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u64 size;
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struct amdgpu_vres_task task;
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};
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struct amdgpu_vram_mgr_resource {
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struct ttm_resource base;
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struct list_head blocks;
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unsigned long flags;
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struct list_head vres_node;
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struct amdgpu_vres_task task;
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};
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static inline u64 amdgpu_vram_mgr_block_start(struct drm_buddy_block *block)
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{
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return drm_buddy_block_offset(block);
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}
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static inline u64 amdgpu_vram_mgr_block_size(struct drm_buddy_block *block)
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{
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return (u64)PAGE_SIZE << drm_buddy_block_order(block);
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}
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static inline bool amdgpu_vram_mgr_is_cleared(struct drm_buddy_block *block)
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{
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return drm_buddy_block_is_clear(block);
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}
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static inline struct amdgpu_vram_mgr_resource *
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to_amdgpu_vram_mgr_resource(struct ttm_resource *res)
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{
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return container_of(res, struct amdgpu_vram_mgr_resource, base);
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}
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static inline void amdgpu_vram_mgr_set_cleared(struct ttm_resource *res)
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{
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struct amdgpu_vram_mgr_resource *ares = to_amdgpu_vram_mgr_resource(res);
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WARN_ON(ares->flags & DRM_BUDDY_CLEARED);
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ares->flags |= DRM_BUDDY_CLEARED;
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}
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int amdgpu_vram_mgr_query_address_block_info(struct amdgpu_vram_mgr *mgr,
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uint64_t address, struct amdgpu_vram_block_info *info);
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#endif
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