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	The last use of intel_ring_cacheline_align() was removed in 2017 by
commit afa8ce5b30 ("drm/i915: Nuke legacy flip queueing code")
Remove it.
Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
Signed-off-by: Tvrtko Ursulin <tursulin@igalia.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241227113754.25871-3-tursulin@igalia.com
		
	
			
		
			
				
	
	
		
			313 lines
		
	
	
	
		
			7.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			313 lines
		
	
	
	
		
			7.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
// SPDX-License-Identifier: MIT
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/*
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 * Copyright © 2019 Intel Corporation
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 */
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#include "gem/i915_gem_internal.h"
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#include "gem/i915_gem_lmem.h"
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#include "gem/i915_gem_object.h"
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#include "i915_drv.h"
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#include "i915_vma.h"
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#include "intel_engine.h"
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#include "intel_engine_regs.h"
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#include "intel_gpu_commands.h"
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#include "intel_ring.h"
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#include "intel_gt.h"
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#include "intel_timeline.h"
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unsigned int intel_ring_update_space(struct intel_ring *ring)
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{
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	unsigned int space;
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	space = __intel_ring_space(ring->head, ring->emit, ring->size);
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	ring->space = space;
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	return space;
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}
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void __intel_ring_pin(struct intel_ring *ring)
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{
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	GEM_BUG_ON(!atomic_read(&ring->pin_count));
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	atomic_inc(&ring->pin_count);
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}
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int intel_ring_pin(struct intel_ring *ring, struct i915_gem_ww_ctx *ww)
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{
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	struct i915_vma *vma = ring->vma;
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	unsigned int flags;
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	void *addr;
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	int ret;
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	if (atomic_fetch_inc(&ring->pin_count))
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		return 0;
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	/* Ring wraparound at offset 0 sometimes hangs. No idea why. */
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	flags = PIN_OFFSET_BIAS | i915_ggtt_pin_bias(vma);
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	if (i915_gem_object_is_stolen(vma->obj))
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		flags |= PIN_MAPPABLE;
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	else
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		flags |= PIN_HIGH;
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	ret = i915_ggtt_pin(vma, ww, 0, flags);
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	if (unlikely(ret))
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		goto err_unpin;
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	if (i915_vma_is_map_and_fenceable(vma) && !HAS_LLC(vma->vm->i915)) {
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		addr = (void __force *)i915_vma_pin_iomap(vma);
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	} else {
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		int type = intel_gt_coherent_map_type(vma->vm->gt, vma->obj, false);
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		addr = i915_gem_object_pin_map(vma->obj, type);
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	}
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	if (IS_ERR(addr)) {
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		ret = PTR_ERR(addr);
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		goto err_ring;
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	}
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	i915_vma_make_unshrinkable(vma);
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	/* Discard any unused bytes beyond that submitted to hw. */
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	intel_ring_reset(ring, ring->emit);
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	ring->vaddr = addr;
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	return 0;
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err_ring:
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	i915_vma_unpin(vma);
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err_unpin:
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	atomic_dec(&ring->pin_count);
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	return ret;
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}
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void intel_ring_reset(struct intel_ring *ring, u32 tail)
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{
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	tail = intel_ring_wrap(ring, tail);
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	ring->tail = tail;
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	ring->head = tail;
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	ring->emit = tail;
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	intel_ring_update_space(ring);
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}
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void intel_ring_unpin(struct intel_ring *ring)
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{
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	struct i915_vma *vma = ring->vma;
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	if (!atomic_dec_and_test(&ring->pin_count))
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		return;
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	i915_vma_unset_ggtt_write(vma);
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	if (i915_vma_is_map_and_fenceable(vma) && !HAS_LLC(vma->vm->i915))
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		i915_vma_unpin_iomap(vma);
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	else
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		i915_gem_object_unpin_map(vma->obj);
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	i915_vma_make_purgeable(vma);
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	i915_vma_unpin(vma);
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}
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static struct i915_vma *create_ring_vma(struct i915_ggtt *ggtt, int size)
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{
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	struct i915_address_space *vm = &ggtt->vm;
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	struct drm_i915_private *i915 = vm->i915;
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	struct drm_i915_gem_object *obj;
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	struct i915_vma *vma;
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	obj = i915_gem_object_create_lmem(i915, size, I915_BO_ALLOC_VOLATILE |
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					  I915_BO_ALLOC_PM_VOLATILE);
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	if (IS_ERR(obj) && i915_ggtt_has_aperture(ggtt) && !HAS_LLC(i915))
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		obj = i915_gem_object_create_stolen(i915, size);
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	if (IS_ERR(obj))
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		obj = i915_gem_object_create_internal(i915, size);
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	if (IS_ERR(obj))
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		return ERR_CAST(obj);
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	/*
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	 * Mark ring buffers as read-only from GPU side (so no stray overwrites)
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	 * if supported by the platform's GGTT.
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	 */
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	if (vm->has_read_only)
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		i915_gem_object_set_readonly(obj);
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	vma = i915_vma_instance(obj, vm, NULL);
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	if (IS_ERR(vma))
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		goto err;
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	return vma;
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err:
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	i915_gem_object_put(obj);
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	return vma;
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}
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struct intel_ring *
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intel_engine_create_ring(struct intel_engine_cs *engine, int size)
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{
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	struct drm_i915_private *i915 = engine->i915;
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	struct intel_ring *ring;
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	struct i915_vma *vma;
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	GEM_BUG_ON(!is_power_of_2(size));
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	GEM_BUG_ON(RING_CTL_SIZE(size) & ~RING_NR_PAGES);
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	ring = kzalloc(sizeof(*ring), GFP_KERNEL);
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	if (!ring)
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		return ERR_PTR(-ENOMEM);
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	kref_init(&ring->ref);
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	ring->size = size;
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	ring->wrap = BITS_PER_TYPE(ring->size) - ilog2(size);
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	/*
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	 * Workaround an erratum on the i830 which causes a hang if
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	 * the TAIL pointer points to within the last 2 cachelines
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	 * of the buffer.
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	 */
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	ring->effective_size = size;
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	if (IS_I830(i915) || IS_I845G(i915))
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		ring->effective_size -= 2 * CACHELINE_BYTES;
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	intel_ring_update_space(ring);
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	vma = create_ring_vma(engine->gt->ggtt, size);
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	if (IS_ERR(vma)) {
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		kfree(ring);
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		return ERR_CAST(vma);
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	}
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	ring->vma = vma;
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	return ring;
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}
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void intel_ring_free(struct kref *ref)
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{
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	struct intel_ring *ring = container_of(ref, typeof(*ring), ref);
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	i915_vma_put(ring->vma);
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	kfree(ring);
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}
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static noinline int
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wait_for_space(struct intel_ring *ring,
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	       struct intel_timeline *tl,
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	       unsigned int bytes)
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{
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	struct i915_request *target;
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	long timeout;
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	if (intel_ring_update_space(ring) >= bytes)
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		return 0;
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	GEM_BUG_ON(list_empty(&tl->requests));
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	list_for_each_entry(target, &tl->requests, link) {
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		if (target->ring != ring)
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			continue;
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		/* Would completion of this request free enough space? */
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		if (bytes <= __intel_ring_space(target->postfix,
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						ring->emit, ring->size))
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			break;
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	}
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	if (GEM_WARN_ON(&target->link == &tl->requests))
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		return -ENOSPC;
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	timeout = i915_request_wait(target,
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				    I915_WAIT_INTERRUPTIBLE,
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				    MAX_SCHEDULE_TIMEOUT);
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	if (timeout < 0)
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		return timeout;
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	i915_request_retire_upto(target);
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	intel_ring_update_space(ring);
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	GEM_BUG_ON(ring->space < bytes);
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	return 0;
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}
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u32 *intel_ring_begin(struct i915_request *rq, unsigned int num_dwords)
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{
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	struct intel_ring *ring = rq->ring;
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	const unsigned int remain_usable = ring->effective_size - ring->emit;
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	const unsigned int bytes = num_dwords * sizeof(u32);
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	unsigned int need_wrap = 0;
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	unsigned int total_bytes;
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	u32 *cs;
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	/* Packets must be qword aligned. */
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	GEM_BUG_ON(num_dwords & 1);
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	total_bytes = bytes + rq->reserved_space;
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	GEM_BUG_ON(total_bytes > ring->effective_size);
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	if (unlikely(total_bytes > remain_usable)) {
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		const int remain_actual = ring->size - ring->emit;
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		if (bytes > remain_usable) {
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			/*
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			 * Not enough space for the basic request. So need to
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			 * flush out the remainder and then wait for
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			 * base + reserved.
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			 */
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			total_bytes += remain_actual;
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			need_wrap = remain_actual | 1;
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		} else  {
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			/*
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			 * The base request will fit but the reserved space
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			 * falls off the end. So we don't need an immediate
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			 * wrap and only need to effectively wait for the
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			 * reserved size from the start of ringbuffer.
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			 */
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			total_bytes = rq->reserved_space + remain_actual;
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		}
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	}
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	if (unlikely(total_bytes > ring->space)) {
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		int ret;
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		/*
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		 * Space is reserved in the ringbuffer for finalising the
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		 * request, as that cannot be allowed to fail. During request
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		 * finalisation, reserved_space is set to 0 to stop the
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		 * overallocation and the assumption is that then we never need
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		 * to wait (which has the risk of failing with EINTR).
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		 *
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		 * See also i915_request_alloc() and i915_request_add().
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		 */
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		GEM_BUG_ON(!rq->reserved_space);
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		ret = wait_for_space(ring,
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				     i915_request_timeline(rq),
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				     total_bytes);
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		if (unlikely(ret))
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			return ERR_PTR(ret);
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	}
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	if (unlikely(need_wrap)) {
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		need_wrap &= ~1;
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		GEM_BUG_ON(need_wrap > ring->space);
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		GEM_BUG_ON(ring->emit + need_wrap > ring->size);
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		GEM_BUG_ON(!IS_ALIGNED(need_wrap, sizeof(u64)));
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		/* Fill the tail with MI_NOOP */
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		memset64(ring->vaddr + ring->emit, 0, need_wrap / sizeof(u64));
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		ring->space -= need_wrap;
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		ring->emit = 0;
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	}
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	GEM_BUG_ON(ring->emit > ring->size - bytes);
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	GEM_BUG_ON(ring->space < bytes);
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	cs = ring->vaddr + ring->emit;
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	if (IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))
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		memset32(cs, POISON_INUSE, bytes / sizeof(*cs));
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	ring->emit += bytes;
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	ring->space -= bytes;
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	return cs;
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}
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#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
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#include "selftest_ring.c"
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#endif
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