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106c7d6148
Abstract the function of amdgpu_gfx_rlc_enter/exit_safe_mode and some part of rlc_init to improve the reusability of RLC. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
98 lines
3.6 KiB
C
98 lines
3.6 KiB
C
/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef __AMDGPU_RLC_H__
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#define __AMDGPU_RLC_H__
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#include "clearstate_defs.h"
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struct amdgpu_rlc_funcs {
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bool (*is_rlc_enabled)(struct amdgpu_device *adev);
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void (*set_safe_mode)(struct amdgpu_device *adev);
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void (*unset_safe_mode)(struct amdgpu_device *adev);
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int (*init)(struct amdgpu_device *adev);
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u32 (*get_csb_size)(struct amdgpu_device *adev);
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void (*get_csb_buffer)(struct amdgpu_device *adev, volatile u32 *buffer);
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int (*get_cp_table_num)(struct amdgpu_device *adev);
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int (*resume)(struct amdgpu_device *adev);
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void (*stop)(struct amdgpu_device *adev);
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void (*reset)(struct amdgpu_device *adev);
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void (*start)(struct amdgpu_device *adev);
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};
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struct amdgpu_rlc {
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/* for power gating */
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struct amdgpu_bo *save_restore_obj;
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uint64_t save_restore_gpu_addr;
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volatile uint32_t *sr_ptr;
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const u32 *reg_list;
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u32 reg_list_size;
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/* for clear state */
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struct amdgpu_bo *clear_state_obj;
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uint64_t clear_state_gpu_addr;
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volatile uint32_t *cs_ptr;
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const struct cs_section_def *cs_data;
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u32 clear_state_size;
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/* for cp tables */
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struct amdgpu_bo *cp_table_obj;
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uint64_t cp_table_gpu_addr;
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volatile uint32_t *cp_table_ptr;
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u32 cp_table_size;
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/* safe mode for updating CG/PG state */
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bool in_safe_mode;
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const struct amdgpu_rlc_funcs *funcs;
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/* for firmware data */
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u32 save_and_restore_offset;
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u32 clear_state_descriptor_offset;
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u32 avail_scratch_ram_locations;
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u32 reg_restore_list_size;
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u32 reg_list_format_start;
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u32 reg_list_format_separate_start;
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u32 starting_offsets_start;
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u32 reg_list_format_size_bytes;
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u32 reg_list_size_bytes;
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u32 reg_list_format_direct_reg_list_length;
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u32 save_restore_list_cntl_size_bytes;
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u32 save_restore_list_gpm_size_bytes;
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u32 save_restore_list_srm_size_bytes;
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u32 *register_list_format;
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u32 *register_restore;
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u8 *save_restore_list_cntl;
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u8 *save_restore_list_gpm;
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u8 *save_restore_list_srm;
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bool is_rlc_v2_1;
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};
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void amdgpu_gfx_rlc_enter_safe_mode(struct amdgpu_device *adev);
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void amdgpu_gfx_rlc_exit_safe_mode(struct amdgpu_device *adev);
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int amdgpu_gfx_rlc_init_sr(struct amdgpu_device *adev, u32 dws);
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int amdgpu_gfx_rlc_init_csb(struct amdgpu_device *adev);
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int amdgpu_gfx_rlc_init_cpt(struct amdgpu_device *adev);
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void amdgpu_gfx_rlc_setup_cp_table(struct amdgpu_device *adev);
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void amdgpu_gfx_rlc_fini(struct amdgpu_device *adev);
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#endif
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