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	When testing the R-Car PCIe driver on the Condor board, if the PCIe PHY
driver was left disabled, the kernel crashed with this BUG:
  kernel BUG at lib/ioremap.c:72!
  Internal error: Oops - BUG: 0 [#1] PREEMPT SMP
  Modules linked in:
  CPU: 0 PID: 39 Comm: kworker/0:1 Not tainted 4.17.0-dirty #1092
  Hardware name: Renesas Condor board based on r8a77980 (DT)
  Workqueue: events deferred_probe_work_func
  pstate: 80000005 (Nzcv daif -PAN -UAO)
  pc : ioremap_page_range+0x370/0x3c8
  lr : ioremap_page_range+0x40/0x3c8
  sp : ffff000008da39e0
  x29: ffff000008da39e0 x28: 00e8000000000f07
  x27: ffff7dfffee00000 x26: 0140000000000000
  x25: ffff7dfffef00000 x24: 00000000000fe100
  x23: ffff80007b906000 x22: ffff000008ab8000
  x21: ffff000008bb1d58 x20: ffff7dfffef00000
  x19: ffff800009c30fb8 x18: 0000000000000001
  x17: 00000000000152d0 x16: 00000000014012d0
  x15: 0000000000000000 x14: 0720072007200720
  x13: 0720072007200720 x12: 0720072007200720
  x11: 0720072007300730 x10: 00000000000000ae
  x9 : 0000000000000000 x8 : ffff7dffff000000
  x7 : 0000000000000000 x6 : 0000000000000100
  x5 : 0000000000000000 x4 : 000000007b906000
  x3 : ffff80007c61a880 x2 : ffff7dfffeefffff
  x1 : 0000000040000000 x0 : 00e80000fe100f07
  Process kworker/0:1 (pid: 39, stack limit = 0x        (ptrval))
  Call trace:
   ioremap_page_range+0x370/0x3c8
   pci_remap_iospace+0x7c/0xac
   pci_parse_request_of_pci_ranges+0x13c/0x190
   rcar_pcie_probe+0x4c/0xb04
   platform_drv_probe+0x50/0xbc
   driver_probe_device+0x21c/0x308
   __device_attach_driver+0x98/0xc8
   bus_for_each_drv+0x54/0x94
   __device_attach+0xc4/0x12c
   device_initial_probe+0x10/0x18
   bus_probe_device+0x90/0x98
   deferred_probe_work_func+0xb0/0x150
   process_one_work+0x12c/0x29c
   worker_thread+0x200/0x3fc
   kthread+0x108/0x134
   ret_from_fork+0x10/0x18
  Code: f9004ba2 54000080 aa0003fb 17ffff48 (d4210000)
It turned out that pci_remap_iospace() wasn't undone when the driver's
probe failed, and since devm_phy_optional_get() returned -EPROBE_DEFER,
the probe was retried, finally causing the BUG due to trying to remap
already remapped pages.
The Versatile PCI controller driver has the same issue.
Replace pci_remap_iospace() with the devm_ managed version to fix the bug.
Fixes: b7e78170ef ("PCI: versatile: Add DT-based ARM Versatile PB PCIe host driver")
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
[lorenzo.pieralisi@arm.com: updated the commit log]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
		
	
			
		
			
				
	
	
		
			239 lines
		
	
	
	
		
			6.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			239 lines
		
	
	
	
		
			6.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
// SPDX-License-Identifier: GPL-2.0
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/*
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 * Copyright 2004 Koninklijke Philips Electronics NV
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 *
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 * Conversion to platform driver and DT:
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 * Copyright 2014 Linaro Ltd.
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 *
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 * 14/04/2005 Initial version, colin.king@philips.com
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 */
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_pci.h>
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#include <linux/of_platform.h>
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#include <linux/pci.h>
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#include <linux/platform_device.h>
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#include "../pci.h"
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static void __iomem *versatile_pci_base;
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static void __iomem *versatile_cfg_base[2];
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#define PCI_IMAP(m)		(versatile_pci_base + ((m) * 4))
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#define PCI_SMAP(m)		(versatile_pci_base + 0x14 + ((m) * 4))
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#define PCI_SELFID		(versatile_pci_base + 0xc)
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#define VP_PCI_DEVICE_ID		0x030010ee
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#define VP_PCI_CLASS_ID			0x0b400000
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static u32 pci_slot_ignore;
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static int __init versatile_pci_slot_ignore(char *str)
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{
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	int retval;
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	int slot;
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	while ((retval = get_option(&str, &slot))) {
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		if ((slot < 0) || (slot > 31))
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			pr_err("Illegal slot value: %d\n", slot);
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		else
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			pci_slot_ignore |= (1 << slot);
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	}
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	return 1;
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}
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__setup("pci_slot_ignore=", versatile_pci_slot_ignore);
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static void __iomem *versatile_map_bus(struct pci_bus *bus,
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				       unsigned int devfn, int offset)
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{
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	unsigned int busnr = bus->number;
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	if (pci_slot_ignore & (1 << PCI_SLOT(devfn)))
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		return NULL;
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	return versatile_cfg_base[1] + ((busnr << 16) | (devfn << 8) | offset);
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}
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static struct pci_ops pci_versatile_ops = {
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	.map_bus = versatile_map_bus,
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	.read	= pci_generic_config_read32,
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	.write	= pci_generic_config_write,
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};
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static int versatile_pci_parse_request_of_pci_ranges(struct device *dev,
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						     struct list_head *res)
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{
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	int err, mem = 1, res_valid = 0;
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	resource_size_t iobase;
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	struct resource_entry *win, *tmp;
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	err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, res, &iobase);
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	if (err)
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		return err;
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	err = devm_request_pci_bus_resources(dev, res);
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	if (err)
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		goto out_release_res;
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	resource_list_for_each_entry_safe(win, tmp, res) {
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		struct resource *res = win->res;
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		switch (resource_type(res)) {
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		case IORESOURCE_IO:
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			err = devm_pci_remap_iospace(dev, res, iobase);
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			if (err) {
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				dev_warn(dev, "error %d: failed to map resource %pR\n",
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					 err, res);
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				resource_list_destroy_entry(win);
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			}
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			break;
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		case IORESOURCE_MEM:
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			res_valid |= !(res->flags & IORESOURCE_PREFETCH);
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			writel(res->start >> 28, PCI_IMAP(mem));
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			writel(PHYS_OFFSET >> 28, PCI_SMAP(mem));
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			mem++;
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			break;
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		}
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	}
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	if (res_valid)
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		return 0;
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	dev_err(dev, "non-prefetchable memory resource required\n");
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	err = -EINVAL;
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out_release_res:
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	pci_free_resource_list(res);
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	return err;
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}
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static int versatile_pci_probe(struct platform_device *pdev)
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{
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	struct device *dev = &pdev->dev;
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	struct resource *res;
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	int ret, i, myslot = -1;
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	u32 val;
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	void __iomem *local_pci_cfg_base;
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	struct pci_bus *bus, *child;
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	struct pci_host_bridge *bridge;
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	LIST_HEAD(pci_res);
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	bridge = devm_pci_alloc_host_bridge(dev, 0);
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	if (!bridge)
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		return -ENOMEM;
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	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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	versatile_pci_base = devm_ioremap_resource(dev, res);
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	if (IS_ERR(versatile_pci_base))
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		return PTR_ERR(versatile_pci_base);
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	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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	versatile_cfg_base[0] = devm_ioremap_resource(dev, res);
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	if (IS_ERR(versatile_cfg_base[0]))
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		return PTR_ERR(versatile_cfg_base[0]);
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	res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
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	versatile_cfg_base[1] = devm_pci_remap_cfg_resource(dev, res);
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	if (IS_ERR(versatile_cfg_base[1]))
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		return PTR_ERR(versatile_cfg_base[1]);
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	ret = versatile_pci_parse_request_of_pci_ranges(dev, &pci_res);
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	if (ret)
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		return ret;
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	/*
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	 * We need to discover the PCI core first to configure itself
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	 * before the main PCI probing is performed
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	 */
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	for (i = 0; i < 32; i++) {
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		if ((readl(versatile_cfg_base[0] + (i << 11) + PCI_VENDOR_ID) == VP_PCI_DEVICE_ID) &&
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		    (readl(versatile_cfg_base[0] + (i << 11) + PCI_CLASS_REVISION) == VP_PCI_CLASS_ID)) {
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			myslot = i;
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			break;
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		}
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	}
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	if (myslot == -1) {
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		dev_err(dev, "Cannot find PCI core!\n");
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		return -EIO;
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	}
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	/*
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	 * Do not to map Versatile FPGA PCI device into memory space
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	 */
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	pci_slot_ignore |= (1 << myslot);
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	dev_info(dev, "PCI core found (slot %d)\n", myslot);
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	writel(myslot, PCI_SELFID);
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	local_pci_cfg_base = versatile_cfg_base[1] + (myslot << 11);
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	val = readl(local_pci_cfg_base + PCI_COMMAND);
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	val |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE;
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	writel(val, local_pci_cfg_base + PCI_COMMAND);
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	/*
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	 * Configure the PCI inbound memory windows to be 1:1 mapped to SDRAM
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	 */
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	writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_0);
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	writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_1);
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	writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_2);
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	/*
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	 * For many years the kernel and QEMU were symbiotically buggy
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	 * in that they both assumed the same broken IRQ mapping.
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	 * QEMU therefore attempts to auto-detect old broken kernels
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	 * so that they still work on newer QEMU as they did on old
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	 * QEMU. Since we now use the correct (ie matching-hardware)
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	 * IRQ mapping we write a definitely different value to a
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	 * PCI_INTERRUPT_LINE register to tell QEMU that we expect
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	 * real hardware behaviour and it need not be backwards
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	 * compatible for us. This write is harmless on real hardware.
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	 */
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	writel(0, versatile_cfg_base[0] + PCI_INTERRUPT_LINE);
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	pci_add_flags(PCI_ENABLE_PROC_DOMAINS);
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	pci_add_flags(PCI_REASSIGN_ALL_BUS);
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	list_splice_init(&pci_res, &bridge->windows);
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	bridge->dev.parent = dev;
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	bridge->sysdata = NULL;
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	bridge->busnr = 0;
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	bridge->ops = &pci_versatile_ops;
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	bridge->map_irq = of_irq_parse_and_map_pci;
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	bridge->swizzle_irq = pci_common_swizzle;
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	ret = pci_scan_root_bus_bridge(bridge);
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	if (ret < 0)
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		return ret;
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	bus = bridge->bus;
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	pci_assign_unassigned_bus_resources(bus);
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	list_for_each_entry(child, &bus->children, node)
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		pcie_bus_configure_settings(child);
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	pci_bus_add_devices(bus);
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	return 0;
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}
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static const struct of_device_id versatile_pci_of_match[] = {
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	{ .compatible = "arm,versatile-pci", },
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	{ },
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};
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MODULE_DEVICE_TABLE(of, versatile_pci_of_match);
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static struct platform_driver versatile_pci_driver = {
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	.driver = {
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		.name = "versatile-pci",
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		.of_match_table = versatile_pci_of_match,
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		.suppress_bind_attrs = true,
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	},
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	.probe = versatile_pci_probe,
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};
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module_platform_driver(versatile_pci_driver);
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MODULE_DESCRIPTION("Versatile PCI driver");
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MODULE_LICENSE("GPL v2");
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