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cc20a38612
This spi driver uses the common spi-bcm-qspi driver and implements iProc SoCs specific interrupt controller. The common driver now calls the SoC handlers when present. Adding support for both muxed l1 and unmuxed interrupt sources. Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com> Signed-off-by: Mark Brown <broonie@kernel.org>
115 lines
3 KiB
C
115 lines
3 KiB
C
/*
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* Copyright 2016 Broadcom
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation (the "GPL").
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License version 2 (GPLv2) for more details.
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*
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* You should have received a copy of the GNU General Public License
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* version 2 (GPLv2) along with this source code.
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*/
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#ifndef __SPI_BCM_QSPI_H__
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#define __SPI_BCM_QSPI_H__
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#include <linux/types.h>
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#include <linux/io.h>
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/* BSPI interrupt masks */
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#define INTR_BSPI_LR_OVERREAD_MASK BIT(4)
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#define INTR_BSPI_LR_SESSION_DONE_MASK BIT(3)
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#define INTR_BSPI_LR_IMPATIENT_MASK BIT(2)
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#define INTR_BSPI_LR_SESSION_ABORTED_MASK BIT(1)
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#define INTR_BSPI_LR_FULLNESS_REACHED_MASK BIT(0)
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#define BSPI_LR_INTERRUPTS_DATA \
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(INTR_BSPI_LR_SESSION_DONE_MASK | \
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INTR_BSPI_LR_FULLNESS_REACHED_MASK)
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#define BSPI_LR_INTERRUPTS_ERROR \
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(INTR_BSPI_LR_OVERREAD_MASK | \
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INTR_BSPI_LR_IMPATIENT_MASK | \
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INTR_BSPI_LR_SESSION_ABORTED_MASK)
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#define BSPI_LR_INTERRUPTS_ALL \
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(BSPI_LR_INTERRUPTS_ERROR | \
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BSPI_LR_INTERRUPTS_DATA)
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/* MSPI Interrupt masks */
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#define INTR_MSPI_HALTED_MASK BIT(6)
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#define INTR_MSPI_DONE_MASK BIT(5)
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#define MSPI_INTERRUPTS_ALL \
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(INTR_MSPI_DONE_MASK | \
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INTR_MSPI_HALTED_MASK)
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#define QSPI_INTERRUPTS_ALL \
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(MSPI_INTERRUPTS_ALL | \
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BSPI_LR_INTERRUPTS_ALL)
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struct platform_device;
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struct dev_pm_ops;
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enum {
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MSPI_DONE = 0x1,
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BSPI_DONE = 0x2,
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BSPI_ERR = 0x4,
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MSPI_BSPI_DONE = 0x7
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};
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struct bcm_qspi_soc_intc {
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void (*bcm_qspi_int_ack)(struct bcm_qspi_soc_intc *soc_intc, int type);
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void (*bcm_qspi_int_set)(struct bcm_qspi_soc_intc *soc_intc, int type,
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bool en);
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u32 (*bcm_qspi_get_int_status)(struct bcm_qspi_soc_intc *soc_intc);
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};
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/* Read controller register*/
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static inline u32 bcm_qspi_readl(bool be, void __iomem *addr)
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{
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if (be)
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return ioread32be(addr);
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else
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return readl_relaxed(addr);
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}
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/* Write controller register*/
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static inline void bcm_qspi_writel(bool be,
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unsigned int data, void __iomem *addr)
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{
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if (be)
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iowrite32be(data, addr);
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else
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writel_relaxed(data, addr);
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}
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static inline u32 get_qspi_mask(int type)
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{
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switch (type) {
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case MSPI_DONE:
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return INTR_MSPI_DONE_MASK;
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case BSPI_DONE:
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return BSPI_LR_INTERRUPTS_ALL;
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case MSPI_BSPI_DONE:
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return QSPI_INTERRUPTS_ALL;
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case BSPI_ERR:
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return BSPI_LR_INTERRUPTS_ERROR;
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}
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return 0;
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}
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/* The common driver functions to be called by the SoC platform driver */
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int bcm_qspi_probe(struct platform_device *pdev,
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struct bcm_qspi_soc_intc *soc_intc);
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int bcm_qspi_remove(struct platform_device *pdev);
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/* pm_ops used by the SoC platform driver called on PM suspend/resume */
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extern const struct dev_pm_ops bcm_qspi_pm_ops;
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#endif /* __SPI_BCM_QSPI_H__ */
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