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================
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SMP IRQ affinity
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================
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ChangeLog:
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	- Started by Ingo Molnar <mingo@redhat.com>
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	- Update by Max Krasnyansky <maxk@qualcomm.com>
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/proc/irq/IRQ#/smp_affinity and /proc/irq/IRQ#/smp_affinity_list specify
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which target CPUs are permitted for a given IRQ source.  It's a bitmask
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(smp_affinity) or cpu list (smp_affinity_list) of allowed CPUs.  It's not
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allowed to turn off all CPUs, and if an IRQ controller does not support
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IRQ affinity then the value will not change from the default of all cpus.
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/proc/irq/default_smp_affinity specifies default affinity mask that applies
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to all non-active IRQs. Once IRQ is allocated/activated its affinity bitmask
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will be set to the default mask. It can then be changed as described above.
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Default mask is 0xffffffff.
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Here is an example of restricting IRQ44 (eth1) to CPU0-3 then restricting
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it to CPU4-7 (this is an 8-CPU SMP box)::
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	[root@moon 44]# cd /proc/irq/44
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	[root@moon 44]# cat smp_affinity
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	ffffffff
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	[root@moon 44]# echo 0f > smp_affinity
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	[root@moon 44]# cat smp_affinity
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	0000000f
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	[root@moon 44]# ping -f h
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	PING hell (195.4.7.3): 56 data bytes
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	...
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	--- hell ping statistics ---
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	6029 packets transmitted, 6027 packets received, 0% packet loss
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	round-trip min/avg/max = 0.1/0.1/0.4 ms
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	[root@moon 44]# cat /proc/interrupts | grep 'CPU\|44:'
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		CPU0       CPU1       CPU2       CPU3      CPU4       CPU5        CPU6       CPU7
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	44:       1068       1785       1785       1783         0          0           0         0    IO-APIC-level  eth1
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As can be seen from the line above IRQ44 was delivered only to the first four
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processors (0-3).
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Now lets restrict that IRQ to CPU(4-7).
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::
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	[root@moon 44]# echo f0 > smp_affinity
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	[root@moon 44]# cat smp_affinity
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	000000f0
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	[root@moon 44]# ping -f h
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	PING hell (195.4.7.3): 56 data bytes
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	..
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	--- hell ping statistics ---
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	2779 packets transmitted, 2777 packets received, 0% packet loss
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	round-trip min/avg/max = 0.1/0.5/585.4 ms
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	[root@moon 44]# cat /proc/interrupts |  'CPU\|44:'
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		CPU0       CPU1       CPU2       CPU3      CPU4       CPU5        CPU6       CPU7
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	44:       1068       1785       1785       1783      1784       1069        1070       1069   IO-APIC-level  eth1
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This time around IRQ44 was delivered only to the last four processors.
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i.e counters for the CPU0-3 did not change.
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Here is an example of limiting that same irq (44) to cpus 1024 to 1031::
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	[root@moon 44]# echo 1024-1031 > smp_affinity_list
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	[root@moon 44]# cat smp_affinity_list
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	1024-1031
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Note that to do this with a bitmask would require 32 bitmasks of zero
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to follow the pertinent one.
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