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	This patch adds atomic, cmpxchg, spinlock files. Signed-off-by: Guo Ren <ren_guo@c-sky.com> Cc: Andrea Parri <andrea.parri@amarulasolutions.com> Cc: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Peter Zijlstra <peterz@infradead.org>
		
			
				
	
	
		
			212 lines
		
	
	
	
		
			4.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			212 lines
		
	
	
	
		
			4.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_CSKY_ATOMIC_H
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#define __ASM_CSKY_ATOMIC_H
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#include <linux/version.h>
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#include <asm/cmpxchg.h>
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#include <asm/barrier.h>
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#ifdef CONFIG_CPU_HAS_LDSTEX
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#define __atomic_add_unless __atomic_add_unless
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static inline int __atomic_add_unless(atomic_t *v, int a, int u)
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{
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	unsigned long tmp, ret;
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	smp_mb();
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	asm volatile (
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	"1:	ldex.w		%0, (%3) \n"
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	"	mov		%1, %0   \n"
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	"	cmpne		%0, %4   \n"
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	"	bf		2f	 \n"
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	"	add		%0, %2   \n"
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	"	stex.w		%0, (%3) \n"
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	"	bez		%0, 1b   \n"
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	"2:				 \n"
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		: "=&r" (tmp), "=&r" (ret)
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		: "r" (a), "r"(&v->counter), "r"(u)
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		: "memory");
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	if (ret != u)
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		smp_mb();
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	return ret;
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}
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#define ATOMIC_OP(op, c_op)						\
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static inline void atomic_##op(int i, atomic_t *v)			\
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{									\
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	unsigned long tmp;						\
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									\
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	asm volatile (							\
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	"1:	ldex.w		%0, (%2) \n"				\
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	"	" #op "		%0, %1   \n"				\
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	"	stex.w		%0, (%2) \n"				\
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	"	bez		%0, 1b   \n"				\
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		: "=&r" (tmp)						\
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		: "r" (i), "r"(&v->counter)				\
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		: "memory");						\
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}
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#define ATOMIC_OP_RETURN(op, c_op)					\
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static inline int atomic_##op##_return(int i, atomic_t *v)		\
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{									\
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	unsigned long tmp, ret;						\
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									\
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	smp_mb();							\
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	asm volatile (							\
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	"1:	ldex.w		%0, (%3) \n"				\
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	"	" #op "		%0, %2   \n"				\
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	"	mov		%1, %0   \n"				\
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	"	stex.w		%0, (%3) \n"				\
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	"	bez		%0, 1b   \n"				\
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		: "=&r" (tmp), "=&r" (ret)				\
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		: "r" (i), "r"(&v->counter)				\
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		: "memory");						\
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	smp_mb();							\
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									\
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	return ret;							\
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}
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#define ATOMIC_FETCH_OP(op, c_op)					\
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static inline int atomic_fetch_##op(int i, atomic_t *v)			\
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{									\
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	unsigned long tmp, ret;						\
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									\
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	smp_mb();							\
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	asm volatile (							\
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	"1:	ldex.w		%0, (%3) \n"				\
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	"	mov		%1, %0   \n"				\
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	"	" #op "		%0, %2   \n"				\
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	"	stex.w		%0, (%3) \n"				\
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	"	bez		%0, 1b   \n"				\
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		: "=&r" (tmp), "=&r" (ret)				\
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		: "r" (i), "r"(&v->counter)				\
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		: "memory");						\
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	smp_mb();							\
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									\
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	return ret;							\
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}
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#else /* CONFIG_CPU_HAS_LDSTEX */
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#include <linux/irqflags.h>
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#define __atomic_add_unless __atomic_add_unless
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static inline int __atomic_add_unless(atomic_t *v, int a, int u)
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{
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	unsigned long tmp, ret, flags;
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	raw_local_irq_save(flags);
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	asm volatile (
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	"	ldw		%0, (%3) \n"
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	"	mov		%1, %0   \n"
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	"	cmpne		%0, %4   \n"
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	"	bf		2f	 \n"
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	"	add		%0, %2   \n"
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	"	stw		%0, (%3) \n"
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	"2:				 \n"
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		: "=&r" (tmp), "=&r" (ret)
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		: "r" (a), "r"(&v->counter), "r"(u)
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		: "memory");
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	raw_local_irq_restore(flags);
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	return ret;
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}
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#define ATOMIC_OP(op, c_op)						\
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static inline void atomic_##op(int i, atomic_t *v)			\
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{									\
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	unsigned long tmp, flags;					\
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									\
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	raw_local_irq_save(flags);					\
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									\
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	asm volatile (							\
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	"	ldw		%0, (%2) \n"				\
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	"	" #op "		%0, %1   \n"				\
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	"	stw		%0, (%2) \n"				\
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		: "=&r" (tmp)						\
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		: "r" (i), "r"(&v->counter)				\
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		: "memory");						\
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									\
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	raw_local_irq_restore(flags);					\
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}
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#define ATOMIC_OP_RETURN(op, c_op)					\
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static inline int atomic_##op##_return(int i, atomic_t *v)		\
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{									\
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	unsigned long tmp, ret, flags;					\
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									\
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	raw_local_irq_save(flags);					\
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									\
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	asm volatile (							\
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	"	ldw		%0, (%3) \n"				\
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	"	" #op "		%0, %2   \n"				\
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	"	stw		%0, (%3) \n"				\
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	"	mov		%1, %0   \n"				\
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		: "=&r" (tmp), "=&r" (ret)				\
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		: "r" (i), "r"(&v->counter)				\
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		: "memory");						\
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									\
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	raw_local_irq_restore(flags);					\
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									\
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	return ret;							\
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}
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#define ATOMIC_FETCH_OP(op, c_op)					\
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static inline int atomic_fetch_##op(int i, atomic_t *v)			\
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{									\
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	unsigned long tmp, ret, flags;					\
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									\
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	raw_local_irq_save(flags);					\
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									\
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	asm volatile (							\
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	"	ldw		%0, (%3) \n"				\
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	"	mov		%1, %0   \n"				\
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	"	" #op "		%0, %2   \n"				\
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	"	stw		%0, (%3) \n"				\
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		: "=&r" (tmp), "=&r" (ret)				\
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		: "r" (i), "r"(&v->counter)				\
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		: "memory");						\
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									\
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	raw_local_irq_restore(flags);					\
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									\
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	return ret;							\
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}
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#endif /* CONFIG_CPU_HAS_LDSTEX */
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#define atomic_add_return atomic_add_return
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ATOMIC_OP_RETURN(add, +)
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#define atomic_sub_return atomic_sub_return
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ATOMIC_OP_RETURN(sub, -)
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#define atomic_fetch_add atomic_fetch_add
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ATOMIC_FETCH_OP(add, +)
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#define atomic_fetch_sub atomic_fetch_sub
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ATOMIC_FETCH_OP(sub, -)
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#define atomic_fetch_and atomic_fetch_and
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ATOMIC_FETCH_OP(and, &)
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#define atomic_fetch_or atomic_fetch_or
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ATOMIC_FETCH_OP(or, |)
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#define atomic_fetch_xor atomic_fetch_xor
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ATOMIC_FETCH_OP(xor, ^)
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#define atomic_and atomic_and
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ATOMIC_OP(and, &)
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#define atomic_or atomic_or
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ATOMIC_OP(or, |)
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#define atomic_xor atomic_xor
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ATOMIC_OP(xor, ^)
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#undef ATOMIC_FETCH_OP
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#undef ATOMIC_OP_RETURN
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#undef ATOMIC_OP
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#include <asm-generic/atomic.h>
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#endif /* __ASM_CSKY_ATOMIC_H */
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