mirror of
https://github.com/torvalds/linux.git
synced 2025-11-04 10:40:15 +02:00
6f52b16c5b
Many user space API headers are missing licensing information, which makes it hard for compliance tools to determine the correct license. By default are files without license information under the default license of the kernel, which is GPLV2. Marking them GPLV2 would exclude them from being included in non GPLV2 code, which is obviously not intended. The user space API headers fall under the syscall exception which is in the kernels COPYING file: NOTE! This copyright does *not* cover user programs that use kernel services by normal system calls - this is merely considered normal use of the kernel, and does *not* fall under the heading of "derived work". otherwise syscall usage would not be possible. Update the files which contain no license information with an SPDX license identifier. The chosen identifier is 'GPL-2.0 WITH Linux-syscall-note' which is the officially assigned identifier for the Linux syscall exception. SPDX license identifiers are a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. See the previous patch in this series for the methodology of how this patch was researched. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
28 lines
1.1 KiB
C
28 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
|
|
#ifndef __ASM_SH_CPU_FEATURES_H
|
|
#define __ASM_SH_CPU_FEATURES_H
|
|
|
|
/*
|
|
* Processor flags
|
|
*
|
|
* Note: When adding a new flag, keep cpu_flags[] in
|
|
* arch/sh/kernel/setup.c in sync so symbolic name
|
|
* mapping of the processor flags has a chance of being
|
|
* reasonably accurate.
|
|
*
|
|
* These flags are also available through the ELF
|
|
* auxiliary vector as AT_HWCAP.
|
|
*/
|
|
#define CPU_HAS_FPU 0x0001 /* Hardware FPU support */
|
|
#define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */
|
|
#define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */
|
|
#define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */
|
|
#define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */
|
|
#define CPU_HAS_PTEA 0x0020 /* PTEA register */
|
|
#define CPU_HAS_LLSC 0x0040 /* movli.l/movco.l */
|
|
#define CPU_HAS_L2_CACHE 0x0080 /* Secondary cache / URAM */
|
|
#define CPU_HAS_OP32 0x0100 /* 32-bit instruction support */
|
|
#define CPU_HAS_PTEAEX 0x0200 /* PTE ASID Extension support */
|
|
#define CPU_HAS_CAS_L 0x0400 /* cas.l atomic compare-and-swap */
|
|
|
|
#endif /* __ASM_SH_CPU_FEATURES_H */
|