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52b31bcc93
The equivalent of both of these are now done via macro magic when the relevant register calls are made. The actual structure elements will shortly go away. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Lars-Peter Clausen <lars@metafoo.de>
380 lines
10 KiB
C
380 lines
10 KiB
C
/*
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* Marvell Berlin2 ADC driver
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*
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* Copyright (C) 2015 Marvell Technology Group Ltd.
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*
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* Antoine Tenart <antoine.tenart@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/iio/iio.h>
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#include <linux/iio/driver.h>
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#include <linux/iio/machine.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/mfd/syscon.h>
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#include <linux/regmap.h>
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#include <linux/sched.h>
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#include <linux/wait.h>
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#define BERLIN2_SM_CTRL 0x14
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#define BERLIN2_SM_CTRL_SM_SOC_INT BIT(1)
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#define BERLIN2_SM_CTRL_SOC_SM_INT BIT(2)
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#define BERLIN2_SM_CTRL_ADC_SEL(x) ((x) << 5) /* 0-15 */
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#define BERLIN2_SM_CTRL_ADC_SEL_MASK GENMASK(8, 5)
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#define BERLIN2_SM_CTRL_ADC_POWER BIT(9)
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#define BERLIN2_SM_CTRL_ADC_CLKSEL_DIV2 (0x0 << 10)
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#define BERLIN2_SM_CTRL_ADC_CLKSEL_DIV3 (0x1 << 10)
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#define BERLIN2_SM_CTRL_ADC_CLKSEL_DIV4 (0x2 << 10)
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#define BERLIN2_SM_CTRL_ADC_CLKSEL_DIV8 (0x3 << 10)
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#define BERLIN2_SM_CTRL_ADC_CLKSEL_MASK GENMASK(11, 10)
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#define BERLIN2_SM_CTRL_ADC_START BIT(12)
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#define BERLIN2_SM_CTRL_ADC_RESET BIT(13)
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#define BERLIN2_SM_CTRL_ADC_BANDGAP_RDY BIT(14)
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#define BERLIN2_SM_CTRL_ADC_CONT_SINGLE (0x0 << 15)
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#define BERLIN2_SM_CTRL_ADC_CONT_CONTINUOUS (0x1 << 15)
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#define BERLIN2_SM_CTRL_ADC_BUFFER_EN BIT(16)
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#define BERLIN2_SM_CTRL_ADC_VREF_EXT (0x0 << 17)
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#define BERLIN2_SM_CTRL_ADC_VREF_INT (0x1 << 17)
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#define BERLIN2_SM_CTRL_ADC_ROTATE BIT(19)
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#define BERLIN2_SM_CTRL_TSEN_EN BIT(20)
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#define BERLIN2_SM_CTRL_TSEN_CLK_SEL_125 (0x0 << 21) /* 1.25 MHz */
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#define BERLIN2_SM_CTRL_TSEN_CLK_SEL_250 (0x1 << 21) /* 2.5 MHz */
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#define BERLIN2_SM_CTRL_TSEN_MODE_0_125 (0x0 << 22) /* 0-125 C */
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#define BERLIN2_SM_CTRL_TSEN_MODE_10_50 (0x1 << 22) /* 10-50 C */
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#define BERLIN2_SM_CTRL_TSEN_RESET BIT(29)
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#define BERLIN2_SM_ADC_DATA 0x20
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#define BERLIN2_SM_ADC_MASK GENMASK(9, 0)
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#define BERLIN2_SM_ADC_STATUS 0x1c
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#define BERLIN2_SM_ADC_STATUS_DATA_RDY(x) BIT(x) /* 0-15 */
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#define BERLIN2_SM_ADC_STATUS_DATA_RDY_MASK GENMASK(15, 0)
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#define BERLIN2_SM_ADC_STATUS_INT_EN(x) (BIT(x) << 16) /* 0-15 */
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#define BERLIN2_SM_ADC_STATUS_INT_EN_MASK GENMASK(31, 16)
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#define BERLIN2_SM_TSEN_STATUS 0x24
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#define BERLIN2_SM_TSEN_STATUS_DATA_RDY BIT(0)
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#define BERLIN2_SM_TSEN_STATUS_INT_EN BIT(1)
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#define BERLIN2_SM_TSEN_DATA 0x28
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#define BERLIN2_SM_TSEN_MASK GENMASK(9, 0)
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#define BERLIN2_SM_TSEN_CTRL 0x74
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#define BERLIN2_SM_TSEN_CTRL_START BIT(8)
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#define BERLIN2_SM_TSEN_CTRL_SETTLING_4 (0x0 << 21) /* 4 us */
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#define BERLIN2_SM_TSEN_CTRL_SETTLING_12 (0x1 << 21) /* 12 us */
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#define BERLIN2_SM_TSEN_CTRL_SETTLING_MASK BIT(21)
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#define BERLIN2_SM_TSEN_CTRL_TRIM(x) ((x) << 22)
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#define BERLIN2_SM_TSEN_CTRL_TRIM_MASK GENMASK(25, 22)
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struct berlin2_adc_priv {
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struct regmap *regmap;
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struct mutex lock;
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wait_queue_head_t wq;
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bool data_available;
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int data;
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};
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#define BERLIN2_ADC_CHANNEL(n, t) \
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{ \
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.channel = n, \
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.datasheet_name = "channel"#n, \
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.type = t, \
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.indexed = 1, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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}
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static const struct iio_chan_spec berlin2_adc_channels[] = {
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BERLIN2_ADC_CHANNEL(0, IIO_VOLTAGE), /* external input */
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BERLIN2_ADC_CHANNEL(1, IIO_VOLTAGE), /* external input */
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BERLIN2_ADC_CHANNEL(2, IIO_VOLTAGE), /* external input */
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BERLIN2_ADC_CHANNEL(3, IIO_VOLTAGE), /* external input */
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BERLIN2_ADC_CHANNEL(4, IIO_VOLTAGE), /* reserved */
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BERLIN2_ADC_CHANNEL(5, IIO_VOLTAGE), /* reserved */
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{ /* temperature sensor */
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.channel = 6,
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.datasheet_name = "channel6",
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.type = IIO_TEMP,
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.indexed = 0,
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.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
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},
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BERLIN2_ADC_CHANNEL(7, IIO_VOLTAGE), /* reserved */
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IIO_CHAN_SOFT_TIMESTAMP(8), /* timestamp */
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};
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static int berlin2_adc_read(struct iio_dev *indio_dev, int channel)
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{
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struct berlin2_adc_priv *priv = iio_priv(indio_dev);
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int data, ret;
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mutex_lock(&priv->lock);
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/* Enable the interrupts */
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regmap_write(priv->regmap, BERLIN2_SM_ADC_STATUS,
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BERLIN2_SM_ADC_STATUS_INT_EN(channel));
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/* Configure the ADC */
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regmap_update_bits(priv->regmap, BERLIN2_SM_CTRL,
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BERLIN2_SM_CTRL_ADC_RESET |
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BERLIN2_SM_CTRL_ADC_SEL_MASK |
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BERLIN2_SM_CTRL_ADC_START,
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BERLIN2_SM_CTRL_ADC_SEL(channel) |
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BERLIN2_SM_CTRL_ADC_START);
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ret = wait_event_interruptible_timeout(priv->wq, priv->data_available,
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msecs_to_jiffies(1000));
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/* Disable the interrupts */
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regmap_update_bits(priv->regmap, BERLIN2_SM_ADC_STATUS,
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BERLIN2_SM_ADC_STATUS_INT_EN(channel), 0);
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if (ret == 0)
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ret = -ETIMEDOUT;
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if (ret < 0) {
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mutex_unlock(&priv->lock);
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return ret;
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}
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regmap_update_bits(priv->regmap, BERLIN2_SM_CTRL,
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BERLIN2_SM_CTRL_ADC_START, 0);
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data = priv->data;
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priv->data_available = false;
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mutex_unlock(&priv->lock);
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return data;
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}
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static int berlin2_adc_tsen_read(struct iio_dev *indio_dev)
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{
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struct berlin2_adc_priv *priv = iio_priv(indio_dev);
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int data, ret;
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mutex_lock(&priv->lock);
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/* Enable interrupts */
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regmap_write(priv->regmap, BERLIN2_SM_TSEN_STATUS,
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BERLIN2_SM_TSEN_STATUS_INT_EN);
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/* Configure the ADC */
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regmap_update_bits(priv->regmap, BERLIN2_SM_CTRL,
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BERLIN2_SM_CTRL_TSEN_RESET |
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BERLIN2_SM_CTRL_ADC_ROTATE,
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BERLIN2_SM_CTRL_ADC_ROTATE);
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/* Configure the temperature sensor */
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regmap_update_bits(priv->regmap, BERLIN2_SM_TSEN_CTRL,
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BERLIN2_SM_TSEN_CTRL_TRIM_MASK |
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BERLIN2_SM_TSEN_CTRL_SETTLING_MASK |
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BERLIN2_SM_TSEN_CTRL_START,
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BERLIN2_SM_TSEN_CTRL_TRIM(3) |
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BERLIN2_SM_TSEN_CTRL_SETTLING_12 |
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BERLIN2_SM_TSEN_CTRL_START);
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ret = wait_event_interruptible_timeout(priv->wq, priv->data_available,
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msecs_to_jiffies(1000));
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/* Disable interrupts */
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regmap_update_bits(priv->regmap, BERLIN2_SM_TSEN_STATUS,
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BERLIN2_SM_TSEN_STATUS_INT_EN, 0);
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if (ret == 0)
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ret = -ETIMEDOUT;
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if (ret < 0) {
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mutex_unlock(&priv->lock);
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return ret;
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}
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regmap_update_bits(priv->regmap, BERLIN2_SM_TSEN_CTRL,
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BERLIN2_SM_TSEN_CTRL_START, 0);
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data = priv->data;
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priv->data_available = false;
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mutex_unlock(&priv->lock);
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return data;
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}
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static int berlin2_adc_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan, int *val,
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int *val2, long mask)
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{
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int temp;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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if (chan->type != IIO_VOLTAGE)
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return -EINVAL;
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*val = berlin2_adc_read(indio_dev, chan->channel);
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if (*val < 0)
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return *val;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_PROCESSED:
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if (chan->type != IIO_TEMP)
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return -EINVAL;
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temp = berlin2_adc_tsen_read(indio_dev);
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if (temp < 0)
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return temp;
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if (temp > 2047)
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temp -= 4096;
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/* Convert to milli Celsius */
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*val = ((temp * 100000) / 264 - 270000);
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return IIO_VAL_INT;
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default:
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break;
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}
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return -EINVAL;
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}
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static irqreturn_t berlin2_adc_irq(int irq, void *private)
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{
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struct berlin2_adc_priv *priv = iio_priv(private);
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unsigned val;
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regmap_read(priv->regmap, BERLIN2_SM_ADC_STATUS, &val);
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if (val & BERLIN2_SM_ADC_STATUS_DATA_RDY_MASK) {
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regmap_read(priv->regmap, BERLIN2_SM_ADC_DATA, &priv->data);
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priv->data &= BERLIN2_SM_ADC_MASK;
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val &= ~BERLIN2_SM_ADC_STATUS_DATA_RDY_MASK;
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regmap_write(priv->regmap, BERLIN2_SM_ADC_STATUS, val);
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priv->data_available = true;
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wake_up_interruptible(&priv->wq);
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}
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return IRQ_HANDLED;
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}
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static irqreturn_t berlin2_adc_tsen_irq(int irq, void *private)
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{
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struct berlin2_adc_priv *priv = iio_priv(private);
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unsigned val;
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regmap_read(priv->regmap, BERLIN2_SM_TSEN_STATUS, &val);
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if (val & BERLIN2_SM_TSEN_STATUS_DATA_RDY) {
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regmap_read(priv->regmap, BERLIN2_SM_TSEN_DATA, &priv->data);
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priv->data &= BERLIN2_SM_TSEN_MASK;
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val &= ~BERLIN2_SM_TSEN_STATUS_DATA_RDY;
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regmap_write(priv->regmap, BERLIN2_SM_TSEN_STATUS, val);
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priv->data_available = true;
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wake_up_interruptible(&priv->wq);
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}
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return IRQ_HANDLED;
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}
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static const struct iio_info berlin2_adc_info = {
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.read_raw = berlin2_adc_read_raw,
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};
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static int berlin2_adc_probe(struct platform_device *pdev)
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{
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struct iio_dev *indio_dev;
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struct berlin2_adc_priv *priv;
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struct device_node *parent_np = of_get_parent(pdev->dev.of_node);
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int irq, tsen_irq;
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int ret;
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indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*priv));
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if (!indio_dev)
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return -ENOMEM;
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priv = iio_priv(indio_dev);
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platform_set_drvdata(pdev, indio_dev);
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priv->regmap = syscon_node_to_regmap(parent_np);
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of_node_put(parent_np);
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if (IS_ERR(priv->regmap))
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return PTR_ERR(priv->regmap);
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irq = platform_get_irq_byname(pdev, "adc");
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if (irq < 0)
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return irq;
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tsen_irq = platform_get_irq_byname(pdev, "tsen");
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if (tsen_irq < 0)
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return tsen_irq;
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ret = devm_request_irq(&pdev->dev, irq, berlin2_adc_irq, 0,
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pdev->dev.driver->name, indio_dev);
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if (ret)
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return ret;
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ret = devm_request_irq(&pdev->dev, tsen_irq, berlin2_adc_tsen_irq,
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0, pdev->dev.driver->name, indio_dev);
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if (ret)
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return ret;
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init_waitqueue_head(&priv->wq);
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mutex_init(&priv->lock);
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indio_dev->dev.parent = &pdev->dev;
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indio_dev->name = dev_name(&pdev->dev);
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indio_dev->modes = INDIO_DIRECT_MODE;
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indio_dev->info = &berlin2_adc_info;
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indio_dev->channels = berlin2_adc_channels;
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indio_dev->num_channels = ARRAY_SIZE(berlin2_adc_channels);
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/* Power up the ADC */
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regmap_update_bits(priv->regmap, BERLIN2_SM_CTRL,
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BERLIN2_SM_CTRL_ADC_POWER,
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BERLIN2_SM_CTRL_ADC_POWER);
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ret = iio_device_register(indio_dev);
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if (ret) {
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/* Power down the ADC */
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regmap_update_bits(priv->regmap, BERLIN2_SM_CTRL,
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BERLIN2_SM_CTRL_ADC_POWER, 0);
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return ret;
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}
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return 0;
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}
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static int berlin2_adc_remove(struct platform_device *pdev)
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{
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struct iio_dev *indio_dev = platform_get_drvdata(pdev);
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struct berlin2_adc_priv *priv = iio_priv(indio_dev);
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iio_device_unregister(indio_dev);
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/* Power down the ADC */
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regmap_update_bits(priv->regmap, BERLIN2_SM_CTRL,
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BERLIN2_SM_CTRL_ADC_POWER, 0);
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return 0;
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}
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static const struct of_device_id berlin2_adc_match[] = {
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{ .compatible = "marvell,berlin2-adc", },
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{ },
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};
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MODULE_DEVICE_TABLE(of, berlin2_adc_match);
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static struct platform_driver berlin2_adc_driver = {
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.driver = {
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.name = "berlin2-adc",
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.of_match_table = berlin2_adc_match,
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},
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.probe = berlin2_adc_probe,
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.remove = berlin2_adc_remove,
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};
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module_platform_driver(berlin2_adc_driver);
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MODULE_AUTHOR("Antoine Tenart <antoine.tenart@free-electrons.com>");
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MODULE_DESCRIPTION("Marvell Berlin2 ADC driver");
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MODULE_LICENSE("GPL v2");
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