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	In preparation for unconditionally passing the struct timer_list pointer to all timer callbacks, switch to using the new timer_setup() and from_timer() to pass the timer pointer explicitly. Switches test of .data field to .function, since .data will be going away. Cc: Mike Marciniszyn <mike.marciniszyn@intel.com> Cc: Dennis Dalessandro <dennis.dalessandro@intel.com> Cc: Doug Ledford <dledford@redhat.com> Cc: Sean Hefty <sean.hefty@intel.com> Cc: Hal Rosenstock <hal.rosenstock@gmail.com> Cc: linux-rdma@vger.kernel.org Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Doug Ledford <dledford@redhat.com>
		
			
				
	
	
		
			322 lines
		
	
	
	
		
			9.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			322 lines
		
	
	
	
		
			9.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Copyright(c) 2015-2017 Intel Corporation.
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 *
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 * This file is provided under a dual BSD/GPLv2 license.  When using or
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 * redistributing this file, you may do so under either license.
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 *
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 * GPL LICENSE SUMMARY
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of version 2 of the GNU General Public License as
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 * published by the Free Software Foundation.
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 *
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 * This program is distributed in the hope that it will be useful, but
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 * WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * General Public License for more details.
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 *
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 * BSD LICENSE
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 *  - Redistributions of source code must retain the above copyright
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 *    notice, this list of conditions and the following disclaimer.
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 *  - Redistributions in binary form must reproduce the above copyright
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 *    notice, this list of conditions and the following disclaimer in
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 *    the documentation and/or other materials provided with the
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 *    distribution.
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 *  - Neither the name of Intel Corporation nor the names of its
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 *    contributors may be used to endorse or promote products derived
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 *    from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 *
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 */
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#ifndef _ASPM_H
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#define _ASPM_H
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#include "hfi.h"
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extern uint aspm_mode;
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enum aspm_mode {
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	ASPM_MODE_DISABLED = 0,	/* ASPM always disabled, performance mode */
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	ASPM_MODE_ENABLED = 1,	/* ASPM always enabled, power saving mode */
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	ASPM_MODE_DYNAMIC = 2,	/* ASPM enabled/disabled dynamically */
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};
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/* Time after which the timer interrupt will re-enable ASPM */
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#define ASPM_TIMER_MS 1000
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/* Time for which interrupts are ignored after a timer has been scheduled */
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#define ASPM_RESCHED_TIMER_MS (ASPM_TIMER_MS / 2)
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/* Two interrupts within this time trigger ASPM disable */
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#define ASPM_TRIGGER_MS 1
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#define ASPM_TRIGGER_NS (ASPM_TRIGGER_MS * 1000 * 1000ull)
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#define ASPM_L1_SUPPORTED(reg) \
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	(((reg & PCI_EXP_LNKCAP_ASPMS) >> 10) & 0x2)
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static inline bool aspm_hw_l1_supported(struct hfi1_devdata *dd)
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{
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	struct pci_dev *parent = dd->pcidev->bus->self;
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	u32 up, dn;
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	/*
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	 * If the driver does not have access to the upstream component,
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	 * it cannot support ASPM L1 at all.
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	 */
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	if (!parent)
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		return false;
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	pcie_capability_read_dword(dd->pcidev, PCI_EXP_LNKCAP, &dn);
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	dn = ASPM_L1_SUPPORTED(dn);
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	pcie_capability_read_dword(parent, PCI_EXP_LNKCAP, &up);
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	up = ASPM_L1_SUPPORTED(up);
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	/* ASPM works on A-step but is reported as not supported */
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	return (!!dn || is_ax(dd)) && !!up;
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}
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/* Set L1 entrance latency for slower entry to L1 */
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static inline void aspm_hw_set_l1_ent_latency(struct hfi1_devdata *dd)
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{
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	u32 l1_ent_lat = 0x4u;
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	u32 reg32;
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	pci_read_config_dword(dd->pcidev, PCIE_CFG_REG_PL3, ®32);
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	reg32 &= ~PCIE_CFG_REG_PL3_L1_ENT_LATENCY_SMASK;
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	reg32 |= l1_ent_lat << PCIE_CFG_REG_PL3_L1_ENT_LATENCY_SHIFT;
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	pci_write_config_dword(dd->pcidev, PCIE_CFG_REG_PL3, reg32);
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}
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static inline void aspm_hw_enable_l1(struct hfi1_devdata *dd)
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{
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	struct pci_dev *parent = dd->pcidev->bus->self;
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	/*
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	 * If the driver does not have access to the upstream component,
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	 * it cannot support ASPM L1 at all.
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	 */
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	if (!parent)
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		return;
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	/* Enable ASPM L1 first in upstream component and then downstream */
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	pcie_capability_clear_and_set_word(parent, PCI_EXP_LNKCTL,
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					   PCI_EXP_LNKCTL_ASPMC,
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					   PCI_EXP_LNKCTL_ASPM_L1);
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	pcie_capability_clear_and_set_word(dd->pcidev, PCI_EXP_LNKCTL,
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					   PCI_EXP_LNKCTL_ASPMC,
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					   PCI_EXP_LNKCTL_ASPM_L1);
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}
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static inline void aspm_hw_disable_l1(struct hfi1_devdata *dd)
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{
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	struct pci_dev *parent = dd->pcidev->bus->self;
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	/* Disable ASPM L1 first in downstream component and then upstream */
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	pcie_capability_clear_and_set_word(dd->pcidev, PCI_EXP_LNKCTL,
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					   PCI_EXP_LNKCTL_ASPMC, 0x0);
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	if (parent)
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		pcie_capability_clear_and_set_word(parent, PCI_EXP_LNKCTL,
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						   PCI_EXP_LNKCTL_ASPMC, 0x0);
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}
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static inline void aspm_enable(struct hfi1_devdata *dd)
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{
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	if (dd->aspm_enabled || aspm_mode == ASPM_MODE_DISABLED ||
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	    !dd->aspm_supported)
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		return;
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	aspm_hw_enable_l1(dd);
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	dd->aspm_enabled = true;
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}
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static inline void aspm_disable(struct hfi1_devdata *dd)
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{
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	if (!dd->aspm_enabled || aspm_mode == ASPM_MODE_ENABLED)
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		return;
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	aspm_hw_disable_l1(dd);
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	dd->aspm_enabled = false;
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}
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static inline void aspm_disable_inc(struct hfi1_devdata *dd)
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{
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	unsigned long flags;
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	spin_lock_irqsave(&dd->aspm_lock, flags);
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	aspm_disable(dd);
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	atomic_inc(&dd->aspm_disabled_cnt);
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	spin_unlock_irqrestore(&dd->aspm_lock, flags);
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}
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static inline void aspm_enable_dec(struct hfi1_devdata *dd)
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{
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	unsigned long flags;
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	spin_lock_irqsave(&dd->aspm_lock, flags);
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	if (atomic_dec_and_test(&dd->aspm_disabled_cnt))
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		aspm_enable(dd);
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	spin_unlock_irqrestore(&dd->aspm_lock, flags);
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}
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/* ASPM processing for each receive context interrupt */
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static inline void aspm_ctx_disable(struct hfi1_ctxtdata *rcd)
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{
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	bool restart_timer;
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	bool close_interrupts;
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	unsigned long flags;
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	ktime_t now, prev;
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	/* Quickest exit for minimum impact */
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	if (!rcd->aspm_intr_supported)
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		return;
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	spin_lock_irqsave(&rcd->aspm_lock, flags);
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	/* PSM contexts are open */
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	if (!rcd->aspm_intr_enable)
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		goto unlock;
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	prev = rcd->aspm_ts_last_intr;
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	now = ktime_get();
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	rcd->aspm_ts_last_intr = now;
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	/* An interrupt pair close together in time */
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	close_interrupts = ktime_to_ns(ktime_sub(now, prev)) < ASPM_TRIGGER_NS;
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	/* Don't push out our timer till this much time has elapsed */
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	restart_timer = ktime_to_ns(ktime_sub(now, rcd->aspm_ts_timer_sched)) >
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				    ASPM_RESCHED_TIMER_MS * NSEC_PER_MSEC;
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	restart_timer = restart_timer && close_interrupts;
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	/* Disable ASPM and schedule timer */
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	if (rcd->aspm_enabled && close_interrupts) {
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		aspm_disable_inc(rcd->dd);
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		rcd->aspm_enabled = false;
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		restart_timer = true;
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	}
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	if (restart_timer) {
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		mod_timer(&rcd->aspm_timer,
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			  jiffies + msecs_to_jiffies(ASPM_TIMER_MS));
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		rcd->aspm_ts_timer_sched = now;
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	}
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unlock:
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	spin_unlock_irqrestore(&rcd->aspm_lock, flags);
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}
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/* Timer function for re-enabling ASPM in the absence of interrupt activity */
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static inline void aspm_ctx_timer_function(struct timer_list *t)
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{
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	struct hfi1_ctxtdata *rcd = from_timer(rcd, t, aspm_timer);
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	unsigned long flags;
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	spin_lock_irqsave(&rcd->aspm_lock, flags);
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	aspm_enable_dec(rcd->dd);
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	rcd->aspm_enabled = true;
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	spin_unlock_irqrestore(&rcd->aspm_lock, flags);
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}
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/*
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 * Disable interrupt processing for verbs contexts when PSM or VNIC contexts
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 * are open.
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 */
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static inline void aspm_disable_all(struct hfi1_devdata *dd)
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{
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	struct hfi1_ctxtdata *rcd;
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	unsigned long flags;
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	u16 i;
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	for (i = 0; i < dd->first_dyn_alloc_ctxt; i++) {
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		rcd = hfi1_rcd_get_by_index(dd, i);
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		if (rcd) {
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			del_timer_sync(&rcd->aspm_timer);
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			spin_lock_irqsave(&rcd->aspm_lock, flags);
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			rcd->aspm_intr_enable = false;
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			spin_unlock_irqrestore(&rcd->aspm_lock, flags);
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			hfi1_rcd_put(rcd);
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		}
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	}
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	aspm_disable(dd);
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	atomic_set(&dd->aspm_disabled_cnt, 0);
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}
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/* Re-enable interrupt processing for verbs contexts */
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static inline void aspm_enable_all(struct hfi1_devdata *dd)
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{
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	struct hfi1_ctxtdata *rcd;
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	unsigned long flags;
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	u16 i;
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	aspm_enable(dd);
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	if (aspm_mode != ASPM_MODE_DYNAMIC)
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		return;
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	for (i = 0; i < dd->first_dyn_alloc_ctxt; i++) {
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		rcd = hfi1_rcd_get_by_index(dd, i);
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		if (rcd) {
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			spin_lock_irqsave(&rcd->aspm_lock, flags);
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			rcd->aspm_intr_enable = true;
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			rcd->aspm_enabled = true;
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			spin_unlock_irqrestore(&rcd->aspm_lock, flags);
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			hfi1_rcd_put(rcd);
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		}
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	}
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}
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static inline void aspm_ctx_init(struct hfi1_ctxtdata *rcd)
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{
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	spin_lock_init(&rcd->aspm_lock);
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	timer_setup(&rcd->aspm_timer, aspm_ctx_timer_function, 0);
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	rcd->aspm_intr_supported = rcd->dd->aspm_supported &&
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		aspm_mode == ASPM_MODE_DYNAMIC &&
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		rcd->ctxt < rcd->dd->first_dyn_alloc_ctxt;
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}
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static inline void aspm_init(struct hfi1_devdata *dd)
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{
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	struct hfi1_ctxtdata *rcd;
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	u16 i;
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	spin_lock_init(&dd->aspm_lock);
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	dd->aspm_supported = aspm_hw_l1_supported(dd);
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	for (i = 0; i < dd->first_dyn_alloc_ctxt; i++) {
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		rcd = hfi1_rcd_get_by_index(dd, i);
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		if (rcd)
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			aspm_ctx_init(rcd);
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		hfi1_rcd_put(rcd);
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	}
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	/* Start with ASPM disabled */
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	aspm_hw_set_l1_ent_latency(dd);
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	dd->aspm_enabled = false;
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	aspm_hw_disable_l1(dd);
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	/* Now turn on ASPM if configured */
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	aspm_enable_all(dd);
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}
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static inline void aspm_exit(struct hfi1_devdata *dd)
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{
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	aspm_disable_all(dd);
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	/* Turn on ASPM on exit to conserve power */
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	aspm_enable(dd);
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}
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#endif /* _ASPM_H */
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