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		031e360186
		
	
	
	
	
		
			
			41f8bba7f5 ("of/pci: Add pci_register_io_range() and
pci_pio_to_address()") added support for PCI I/O space mapped into CPU
physical memory space.  With that support, the I/O ranges configured for
PCI/PCIe hosts on some architectures can be mapped to logical PIO and
converted easily between CPU address and the corresponding logical PIO.
Based on this, PCI I/O port space can be accessed via in/out accessors that
use memory read/write.
But on some platforms, there are bus hosts that access I/O port space with
host-local I/O port addresses rather than memory addresses.
Add a more generic I/O mapping method to support those devices.  With this
patch, both the CPU addresses and the host-local port can be mapped into
the logical PIO space with different logical/fake PIOs.  After this, all
the I/O accesses to either PCI MMIO devices or host-local I/O peripherals
can be unified into the existing I/O accessors defined in asm-generic/io.h
and be redirected to the right device-specific hooks based on the input
logical PIO.
Tested-by: dann frazier <dann.frazier@canonical.com>
Signed-off-by: Zhichang Yuan <yuanzhichang@hisilicon.com>
Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com>
Signed-off-by: John Garry <john.garry@huawei.com>
[bhelgaas: remove -EFAULT return from logic_pio_register_range() per
https://lkml.kernel.org/r/20180403143909.GA21171@ulmo, fix NULL pointer
checking per https://lkml.kernel.org/r/20180403211505.GA29612@embeddedor.com]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
		
			
				
	
	
		
			280 lines
		
	
	
	
		
			7.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			280 lines
		
	
	
	
		
			7.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0+
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| /*
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|  * Copyright (C) 2017 HiSilicon Limited, All Rights Reserved.
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|  * Author: Gabriele Paoloni <gabriele.paoloni@huawei.com>
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|  * Author: Zhichang Yuan <yuanzhichang@hisilicon.com>
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|  */
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| 
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| #define pr_fmt(fmt)	"LOGIC PIO: " fmt
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| 
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| #include <linux/of.h>
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| #include <linux/io.h>
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| #include <linux/logic_pio.h>
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| #include <linux/mm.h>
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| #include <linux/rculist.h>
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| #include <linux/sizes.h>
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| #include <linux/slab.h>
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| 
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| /* The unique hardware address list */
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| static LIST_HEAD(io_range_list);
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| static DEFINE_MUTEX(io_range_mutex);
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| 
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| /* Consider a kernel general helper for this */
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| #define in_range(b, first, len)        ((b) >= (first) && (b) < (first) + (len))
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| 
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| /**
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|  * logic_pio_register_range - register logical PIO range for a host
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|  * @new_range: pointer to the IO range to be registered.
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|  *
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|  * Returns 0 on success, the error code in case of failure.
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|  *
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|  * Register a new IO range node in the IO range list.
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|  */
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| int logic_pio_register_range(struct logic_pio_hwaddr *new_range)
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| {
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| 	struct logic_pio_hwaddr *range;
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| 	resource_size_t start;
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| 	resource_size_t end;
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| 	resource_size_t mmio_sz = 0;
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| 	resource_size_t iio_sz = MMIO_UPPER_LIMIT;
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| 	int ret = 0;
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| 
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| 	if (!new_range || !new_range->fwnode || !new_range->size)
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| 		return -EINVAL;
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| 
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| 	start = new_range->hw_start;
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| 	end = new_range->hw_start + new_range->size;
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| 
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| 	mutex_lock(&io_range_mutex);
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| 	list_for_each_entry_rcu(range, &io_range_list, list) {
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| 		if (range->fwnode == new_range->fwnode) {
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| 			/* range already there */
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| 			goto end_register;
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| 		}
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| 		if (range->flags == LOGIC_PIO_CPU_MMIO &&
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| 		    new_range->flags == LOGIC_PIO_CPU_MMIO) {
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| 			/* for MMIO ranges we need to check for overlap */
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| 			if (start >= range->hw_start + range->size ||
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| 			    end < range->hw_start) {
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| 				mmio_sz += range->size;
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| 			} else {
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| 				ret = -EFAULT;
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| 				goto end_register;
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| 			}
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| 		} else if (range->flags == LOGIC_PIO_INDIRECT &&
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| 			   new_range->flags == LOGIC_PIO_INDIRECT) {
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| 			iio_sz += range->size;
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| 		}
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| 	}
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| 
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| 	/* range not registered yet, check for available space */
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| 	if (new_range->flags == LOGIC_PIO_CPU_MMIO) {
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| 		if (mmio_sz + new_range->size - 1 > MMIO_UPPER_LIMIT) {
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| 			/* if it's too big check if 64K space can be reserved */
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| 			if (mmio_sz + SZ_64K - 1 > MMIO_UPPER_LIMIT) {
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| 				ret = -E2BIG;
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| 				goto end_register;
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| 			}
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| 			new_range->size = SZ_64K;
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| 			pr_warn("Requested IO range too big, new size set to 64K\n");
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| 		}
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| 		new_range->io_start = mmio_sz;
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| 	} else if (new_range->flags == LOGIC_PIO_INDIRECT) {
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| 		if (iio_sz + new_range->size - 1 > IO_SPACE_LIMIT) {
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| 			ret = -E2BIG;
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| 			goto end_register;
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| 		}
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| 		new_range->io_start = iio_sz;
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| 	} else {
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| 		/* invalid flag */
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| 		ret = -EINVAL;
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| 		goto end_register;
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| 	}
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| 
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| 	list_add_tail_rcu(&new_range->list, &io_range_list);
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| 
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| end_register:
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| 	mutex_unlock(&io_range_mutex);
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| 	return ret;
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| }
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| 
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| /**
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|  * find_io_range_by_fwnode - find logical PIO range for given FW node
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|  * @fwnode: FW node handle associated with logical PIO range
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|  *
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|  * Returns pointer to node on success, NULL otherwise.
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|  *
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|  * Traverse the io_range_list to find the registered node for @fwnode.
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|  */
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| struct logic_pio_hwaddr *find_io_range_by_fwnode(struct fwnode_handle *fwnode)
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| {
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| 	struct logic_pio_hwaddr *range;
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| 
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| 	list_for_each_entry_rcu(range, &io_range_list, list) {
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| 		if (range->fwnode == fwnode)
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| 			return range;
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| 	}
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| 	return NULL;
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| }
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| 
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| /* Return a registered range given an input PIO token */
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| static struct logic_pio_hwaddr *find_io_range(unsigned long pio)
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| {
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| 	struct logic_pio_hwaddr *range;
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| 
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| 	list_for_each_entry_rcu(range, &io_range_list, list) {
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| 		if (in_range(pio, range->io_start, range->size))
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| 			return range;
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| 	}
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| 	pr_err("PIO entry token %lx invalid\n", pio);
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| 	return NULL;
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| }
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| 
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| /**
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|  * logic_pio_to_hwaddr - translate logical PIO to HW address
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|  * @pio: logical PIO value
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|  *
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|  * Returns HW address if valid, ~0 otherwise.
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|  *
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|  * Translate the input logical PIO to the corresponding hardware address.
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|  * The input PIO should be unique in the whole logical PIO space.
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|  */
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| resource_size_t logic_pio_to_hwaddr(unsigned long pio)
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| {
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| 	struct logic_pio_hwaddr *range;
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| 
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| 	range = find_io_range(pio);
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| 	if (range)
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| 		return range->hw_start + pio - range->io_start;
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| 
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| 	return (resource_size_t)~0;
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| }
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| 
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| /**
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|  * logic_pio_trans_hwaddr - translate HW address to logical PIO
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|  * @fwnode: FW node reference for the host
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|  * @addr: Host-relative HW address
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|  * @size: size to translate
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|  *
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|  * Returns Logical PIO value if successful, ~0UL otherwise
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|  */
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| unsigned long logic_pio_trans_hwaddr(struct fwnode_handle *fwnode,
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| 				     resource_size_t addr, resource_size_t size)
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| {
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| 	struct logic_pio_hwaddr *range;
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| 
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| 	range = find_io_range_by_fwnode(fwnode);
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| 	if (!range || range->flags == LOGIC_PIO_CPU_MMIO) {
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| 		pr_err("IO range not found or invalid\n");
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| 		return ~0UL;
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| 	}
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| 	if (range->size < size) {
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| 		pr_err("resource size %pa cannot fit in IO range size %pa\n",
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| 		       &size, &range->size);
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| 		return ~0UL;
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| 	}
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| 	return addr - range->hw_start + range->io_start;
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| }
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| 
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| unsigned long logic_pio_trans_cpuaddr(resource_size_t addr)
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| {
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| 	struct logic_pio_hwaddr *range;
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| 
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| 	list_for_each_entry_rcu(range, &io_range_list, list) {
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| 		if (range->flags != LOGIC_PIO_CPU_MMIO)
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| 			continue;
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| 		if (in_range(addr, range->hw_start, range->size))
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| 			return addr - range->hw_start + range->io_start;
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| 	}
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| 	pr_err("addr %llx not registered in io_range_list\n",
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| 	       (unsigned long long) addr);
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| 	return ~0UL;
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| }
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| 
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| #if defined(CONFIG_INDIRECT_PIO) && defined(PCI_IOBASE)
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| #define BUILD_LOGIC_IO(bw, type)					\
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| type logic_in##bw(unsigned long addr)					\
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| {									\
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| 	type ret = (type)~0;						\
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| 									\
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| 	if (addr < MMIO_UPPER_LIMIT) {					\
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| 		ret = read##bw(PCI_IOBASE + addr);			\
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| 	} else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \
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| 		struct logic_pio_hwaddr *entry = find_io_range(addr);	\
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| 									\
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| 		if (entry && entry->ops)				\
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| 			ret = entry->ops->in(entry->hostdata,		\
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| 					addr, sizeof(type));		\
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| 		else							\
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| 			WARN_ON_ONCE(1);				\
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| 	}								\
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| 	return ret;							\
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| }									\
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| 									\
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| void logic_out##bw(type value, unsigned long addr)			\
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| {									\
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| 	if (addr < MMIO_UPPER_LIMIT) {					\
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| 		write##bw(value, PCI_IOBASE + addr);			\
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| 	} else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) {	\
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| 		struct logic_pio_hwaddr *entry = find_io_range(addr);	\
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| 									\
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| 		if (entry && entry->ops)				\
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| 			entry->ops->out(entry->hostdata,		\
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| 					addr, value, sizeof(type));	\
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| 		else							\
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| 			WARN_ON_ONCE(1);				\
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| 	}								\
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| }									\
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| 									\
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| void logic_ins##bw(unsigned long addr, void *buffer,		\
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| 		   unsigned int count)					\
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| {									\
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| 	if (addr < MMIO_UPPER_LIMIT) {					\
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| 		reads##bw(PCI_IOBASE + addr, buffer, count);		\
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| 	} else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) {	\
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| 		struct logic_pio_hwaddr *entry = find_io_range(addr);	\
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| 									\
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| 		if (entry && entry->ops)				\
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| 			entry->ops->ins(entry->hostdata,		\
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| 				addr, buffer, sizeof(type), count);	\
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| 		else							\
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| 			WARN_ON_ONCE(1);				\
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| 	}								\
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| 									\
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| }									\
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| 									\
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| void logic_outs##bw(unsigned long addr, const void *buffer,		\
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| 		    unsigned int count)					\
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| {									\
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| 	if (addr < MMIO_UPPER_LIMIT) {					\
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| 		writes##bw(PCI_IOBASE + addr, buffer, count);		\
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| 	} else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) {	\
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| 		struct logic_pio_hwaddr *entry = find_io_range(addr);	\
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| 									\
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| 		if (entry && entry->ops)				\
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| 			entry->ops->outs(entry->hostdata,		\
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| 				addr, buffer, sizeof(type), count);	\
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| 		else							\
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| 			WARN_ON_ONCE(1);				\
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| 	}								\
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| }
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| 
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| BUILD_LOGIC_IO(b, u8)
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| EXPORT_SYMBOL(logic_inb);
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| EXPORT_SYMBOL(logic_insb);
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| EXPORT_SYMBOL(logic_outb);
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| EXPORT_SYMBOL(logic_outsb);
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| 
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| BUILD_LOGIC_IO(w, u16)
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| EXPORT_SYMBOL(logic_inw);
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| EXPORT_SYMBOL(logic_insw);
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| EXPORT_SYMBOL(logic_outw);
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| EXPORT_SYMBOL(logic_outsw);
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| 
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| BUILD_LOGIC_IO(l, u32)
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| EXPORT_SYMBOL(logic_inl);
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| EXPORT_SYMBOL(logic_insl);
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| EXPORT_SYMBOL(logic_outl);
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| EXPORT_SYMBOL(logic_outsl);
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| 
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| #endif /* CONFIG_INDIRECT_PIO && PCI_IOBASE */
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