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ADC and DAC can be clocked from separate or same sources CLK1 and CLK2. By default, ADC is clocked from CLK1, and DAC - from CLK2. This commits allows sound cards to selest a proper clock source during `hw_params()` via `snd_soc_dai_set_sysclk()`. It makes possible to have a single clock source for both ADC and DAC. Signed-off-by: Kirill Marinushkin <kmarinushkin@birdec.tech> Signed-off-by: Mark Brown <broonie@kernel.org>
346 lines
8.1 KiB
C
346 lines
8.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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//
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// PCM3060 codec driver
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//
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// Copyright (C) 2018 Kirill Marinushkin <kmarinushkin@birdec.tech>
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#include <linux/module.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/tlv.h>
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#include "pcm3060.h"
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/* dai */
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static int pcm3060_set_sysclk(struct snd_soc_dai *dai, int clk_id,
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unsigned int freq, int dir)
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{
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struct snd_soc_component *comp = dai->component;
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struct pcm3060_priv *priv = snd_soc_component_get_drvdata(comp);
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unsigned int reg;
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unsigned int val;
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if (dir != SND_SOC_CLOCK_IN) {
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dev_err(comp->dev, "unsupported sysclock dir: %d\n", dir);
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return -EINVAL;
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}
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switch (clk_id) {
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case PCM3060_CLK_DEF:
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val = 0;
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break;
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case PCM3060_CLK1:
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val = (dai->id == PCM3060_DAI_ID_DAC ? PCM3060_REG_CSEL : 0);
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break;
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case PCM3060_CLK2:
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val = (dai->id == PCM3060_DAI_ID_DAC ? 0 : PCM3060_REG_CSEL);
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break;
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default:
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dev_err(comp->dev, "unsupported sysclock id: %d\n", clk_id);
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return -EINVAL;
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}
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if (dai->id == PCM3060_DAI_ID_DAC)
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reg = PCM3060_REG67;
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else
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reg = PCM3060_REG72;
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regmap_update_bits(priv->regmap, reg, PCM3060_REG_CSEL, val);
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priv->dai[dai->id].sclk_freq = freq;
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return 0;
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}
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static int pcm3060_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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{
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struct snd_soc_component *comp = dai->component;
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struct pcm3060_priv *priv = snd_soc_component_get_drvdata(comp);
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unsigned int reg;
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unsigned int val;
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if ((fmt & SND_SOC_DAIFMT_INV_MASK) != SND_SOC_DAIFMT_NB_NF) {
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dev_err(comp->dev, "unsupported DAI polarity: 0x%x\n", fmt);
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return -EINVAL;
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}
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBM_CFM:
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priv->dai[dai->id].is_master = true;
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break;
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case SND_SOC_DAIFMT_CBS_CFS:
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priv->dai[dai->id].is_master = false;
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break;
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default:
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dev_err(comp->dev, "unsupported DAI master mode: 0x%x\n", fmt);
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return -EINVAL;
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}
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_I2S:
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val = PCM3060_REG_FMT_I2S;
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break;
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case SND_SOC_DAIFMT_RIGHT_J:
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val = PCM3060_REG_FMT_RJ;
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break;
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case SND_SOC_DAIFMT_LEFT_J:
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val = PCM3060_REG_FMT_LJ;
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break;
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default:
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dev_err(comp->dev, "unsupported DAI format: 0x%x\n", fmt);
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return -EINVAL;
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}
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if (dai->id == PCM3060_DAI_ID_DAC)
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reg = PCM3060_REG67;
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else
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reg = PCM3060_REG72;
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regmap_update_bits(priv->regmap, reg, PCM3060_REG_MASK_FMT, val);
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return 0;
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}
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static int pcm3060_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_component *comp = dai->component;
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struct pcm3060_priv *priv = snd_soc_component_get_drvdata(comp);
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unsigned int rate;
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unsigned int ratio;
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unsigned int reg;
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unsigned int val;
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if (!priv->dai[dai->id].is_master) {
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val = PCM3060_REG_MS_S;
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goto val_ready;
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}
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rate = params_rate(params);
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if (!rate) {
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dev_err(comp->dev, "rate is not configured\n");
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return -EINVAL;
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}
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ratio = priv->dai[dai->id].sclk_freq / rate;
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switch (ratio) {
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case 768:
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val = PCM3060_REG_MS_M768;
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break;
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case 512:
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val = PCM3060_REG_MS_M512;
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break;
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case 384:
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val = PCM3060_REG_MS_M384;
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break;
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case 256:
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val = PCM3060_REG_MS_M256;
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break;
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case 192:
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val = PCM3060_REG_MS_M192;
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break;
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case 128:
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val = PCM3060_REG_MS_M128;
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break;
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default:
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dev_err(comp->dev, "unsupported ratio: %d\n", ratio);
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return -EINVAL;
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}
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val_ready:
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if (dai->id == PCM3060_DAI_ID_DAC)
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reg = PCM3060_REG67;
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else
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reg = PCM3060_REG72;
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regmap_update_bits(priv->regmap, reg, PCM3060_REG_MASK_MS, val);
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return 0;
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}
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static const struct snd_soc_dai_ops pcm3060_dai_ops = {
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.set_sysclk = pcm3060_set_sysclk,
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.set_fmt = pcm3060_set_fmt,
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.hw_params = pcm3060_hw_params,
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};
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#define PCM3060_DAI_RATES_ADC (SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_32000 | \
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SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | \
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SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
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#define PCM3060_DAI_RATES_DAC (PCM3060_DAI_RATES_ADC | \
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SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000)
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static struct snd_soc_dai_driver pcm3060_dai[] = {
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{
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.name = "pcm3060-dac",
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.id = PCM3060_DAI_ID_DAC,
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.playback = {
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.stream_name = "Playback",
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.channels_min = 2,
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.channels_max = 2,
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.rates = PCM3060_DAI_RATES_DAC,
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.formats = SNDRV_PCM_FMTBIT_S24_LE,
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},
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.ops = &pcm3060_dai_ops,
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},
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{
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.name = "pcm3060-adc",
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.id = PCM3060_DAI_ID_ADC,
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.capture = {
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.stream_name = "Capture",
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.channels_min = 2,
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.channels_max = 2,
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.rates = PCM3060_DAI_RATES_ADC,
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.formats = SNDRV_PCM_FMTBIT_S24_LE,
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},
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.ops = &pcm3060_dai_ops,
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},
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};
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/* dapm */
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static DECLARE_TLV_DB_SCALE(pcm3060_dapm_tlv, -10050, 50, 1);
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static const struct snd_kcontrol_new pcm3060_dapm_controls[] = {
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SOC_DOUBLE_R_RANGE_TLV("Master Playback Volume",
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PCM3060_REG65, PCM3060_REG66, 0,
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PCM3060_REG_AT2_MIN, PCM3060_REG_AT2_MAX,
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0, pcm3060_dapm_tlv),
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SOC_DOUBLE("Master Playback Switch", PCM3060_REG68,
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PCM3060_REG_SHIFT_MUT21, PCM3060_REG_SHIFT_MUT22, 1, 1),
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SOC_DOUBLE_R_RANGE_TLV("Master Capture Volume",
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PCM3060_REG70, PCM3060_REG71, 0,
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PCM3060_REG_AT1_MIN, PCM3060_REG_AT1_MAX,
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0, pcm3060_dapm_tlv),
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SOC_DOUBLE("Master Capture Switch", PCM3060_REG73,
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PCM3060_REG_SHIFT_MUT11, PCM3060_REG_SHIFT_MUT12, 1, 1),
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};
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static const struct snd_soc_dapm_widget pcm3060_dapm_widgets[] = {
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SND_SOC_DAPM_DAC("DAC", "Playback", PCM3060_REG64,
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PCM3060_REG_SHIFT_DAPSV, 1),
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SND_SOC_DAPM_OUTPUT("OUTL"),
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SND_SOC_DAPM_OUTPUT("OUTR"),
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SND_SOC_DAPM_INPUT("INL"),
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SND_SOC_DAPM_INPUT("INR"),
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SND_SOC_DAPM_ADC("ADC", "Capture", PCM3060_REG64,
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PCM3060_REG_SHIFT_ADPSV, 1),
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};
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static const struct snd_soc_dapm_route pcm3060_dapm_map[] = {
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{ "OUTL", NULL, "DAC" },
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{ "OUTR", NULL, "DAC" },
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{ "ADC", NULL, "INL" },
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{ "ADC", NULL, "INR" },
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};
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/* soc component */
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static const struct snd_soc_component_driver pcm3060_soc_comp_driver = {
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.controls = pcm3060_dapm_controls,
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.num_controls = ARRAY_SIZE(pcm3060_dapm_controls),
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.dapm_widgets = pcm3060_dapm_widgets,
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.num_dapm_widgets = ARRAY_SIZE(pcm3060_dapm_widgets),
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.dapm_routes = pcm3060_dapm_map,
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.num_dapm_routes = ARRAY_SIZE(pcm3060_dapm_map),
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};
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/* regmap */
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static bool pcm3060_reg_writeable(struct device *dev, unsigned int reg)
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{
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return (reg >= PCM3060_REG64);
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}
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static bool pcm3060_reg_readable(struct device *dev, unsigned int reg)
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{
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return (reg >= PCM3060_REG64);
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}
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static bool pcm3060_reg_volatile(struct device *dev, unsigned int reg)
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{
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/* PCM3060_REG64 is volatile */
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return (reg == PCM3060_REG64);
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}
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static const struct reg_default pcm3060_reg_defaults[] = {
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{ PCM3060_REG64, 0xF0 },
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{ PCM3060_REG65, 0xFF },
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{ PCM3060_REG66, 0xFF },
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{ PCM3060_REG67, 0x00 },
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{ PCM3060_REG68, 0x00 },
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{ PCM3060_REG69, 0x00 },
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{ PCM3060_REG70, 0xD7 },
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{ PCM3060_REG71, 0xD7 },
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{ PCM3060_REG72, 0x00 },
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{ PCM3060_REG73, 0x00 },
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};
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const struct regmap_config pcm3060_regmap = {
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.reg_bits = 8,
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.val_bits = 8,
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.writeable_reg = pcm3060_reg_writeable,
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.readable_reg = pcm3060_reg_readable,
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.volatile_reg = pcm3060_reg_volatile,
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.max_register = PCM3060_REG73,
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.reg_defaults = pcm3060_reg_defaults,
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.num_reg_defaults = ARRAY_SIZE(pcm3060_reg_defaults),
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.cache_type = REGCACHE_RBTREE,
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};
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EXPORT_SYMBOL(pcm3060_regmap);
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/* device */
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static void pcm3060_parse_dt(const struct device_node *np,
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struct pcm3060_priv *priv)
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{
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priv->out_se = of_property_read_bool(np, "ti,out-single-ended");
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}
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int pcm3060_probe(struct device *dev)
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{
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int rc;
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struct pcm3060_priv *priv = dev_get_drvdata(dev);
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/* soft reset */
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rc = regmap_update_bits(priv->regmap, PCM3060_REG64,
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PCM3060_REG_MRST, 0);
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if (rc) {
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dev_err(dev, "failed to reset component, rc=%d\n", rc);
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return rc;
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}
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if (dev->of_node)
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pcm3060_parse_dt(dev->of_node, priv);
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if (priv->out_se)
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regmap_update_bits(priv->regmap, PCM3060_REG64,
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PCM3060_REG_SE, PCM3060_REG_SE);
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rc = devm_snd_soc_register_component(dev, &pcm3060_soc_comp_driver,
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pcm3060_dai,
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ARRAY_SIZE(pcm3060_dai));
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if (rc) {
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dev_err(dev, "failed to register component, rc=%d\n", rc);
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return rc;
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}
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return 0;
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}
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EXPORT_SYMBOL(pcm3060_probe);
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MODULE_DESCRIPTION("PCM3060 codec driver");
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MODULE_AUTHOR("Kirill Marinushkin <kmarinushkin@birdec.tech>");
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MODULE_LICENSE("GPL v2");
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