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	 d2912cb15b
			
		
	
	
		d2912cb15b
		
	
	
	
	
		
			
			Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
		
			
				
	
	
		
			66 lines
		
	
	
	
		
			1.2 KiB
		
	
	
	
		
			Text
		
	
	
	
	
	
			
		
		
	
	
			66 lines
		
	
	
	
		
			1.2 KiB
		
	
	
	
		
			Text
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0-only
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| /*
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|  * Copyright (C) 2016-2014 Synopsys, Inc. (www.synopsys.com)
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|  */
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| /dts-v1/;
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| 
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| /include/ "skeleton_hs.dtsi"
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| 
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| / {
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| 	model = "snps,zebu_hs";
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| 	compatible = "snps,zebu_hs";
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| 	#address-cells = <1>;
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| 	#size-cells = <1>;
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| 	interrupt-parent = <&core_intc>;
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| 
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| 	memory {
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| 		device_type = "memory";
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| 		reg = <0x80000000 0x20000000>;	/* 512 */
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| 	};
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| 
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| 	chosen {
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| 		bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1";
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| 	};
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| 
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| 	aliases {
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| 		serial0 = &uart0;
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| 	};
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| 
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| 	fpga {
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| 		compatible = "simple-bus";
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| 		#address-cells = <1>;
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| 		#size-cells = <1>;
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| 
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| 		/* child and parent address space 1:1 mapped */
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| 		ranges;
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| 
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| 		core_clk: core_clk {
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| 			#clock-cells = <0>;
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| 			compatible = "fixed-clock";
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| 			clock-frequency = <50000000>;
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| 		};
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| 
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| 		core_intc: interrupt-controller {
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| 			compatible = "snps,archs-intc";
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| 			interrupt-controller;
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| 			#interrupt-cells = <1>;
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| 		};
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| 
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| 		uart0: serial@f0000000 {
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| 			compatible = "ns8250";
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| 			reg = <0xf0000000 0x2000>;
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| 			interrupts = <24>;
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| 			clock-frequency = <50000000>;
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| 			baud = <115200>;
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| 			reg-shift = <2>;
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| 			reg-io-width = <4>;
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| 			no-loopback-test = <1>;
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| 		};
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| 
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| 		arcpct0: pct {
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| 			compatible = "snps,archs-pct";
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| 			#interrupt-cells = <1>;
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| 			interrupts = <20>;
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| 		};
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| 	};
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| };
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