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Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
60 lines
1.3 KiB
C
60 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* cs4265.h -- CS4265 ALSA SoC audio driver
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*
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* Copyright 2014 Cirrus Logic, Inc.
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*
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* Author: Paul Handrigan <paul.handrigan@cirrus.com>
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*/
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#ifndef __CS4265_H__
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#define __CS4265_H__
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#define CS4265_CHIP_ID 0x1
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#define CS4265_CHIP_ID_VAL 0xD0
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#define CS4265_CHIP_ID_MASK 0xF0
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#define CS4265_REV_ID_MASK 0x0F
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#define CS4265_PWRCTL 0x02
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#define CS4265_PWRCTL_PDN 1
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#define CS4265_DAC_CTL 0x3
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#define CS4265_DAC_CTL_MUTE (1 << 2)
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#define CS4265_DAC_CTL_DIF (3 << 4)
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#define CS4265_ADC_CTL 0x4
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#define CS4265_ADC_MASTER 1
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#define CS4265_ADC_DIF (1 << 4)
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#define CS4265_ADC_FM (3 << 6)
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#define CS4265_MCLK_FREQ 0x5
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#define CS4265_MCLK_FREQ_MASK (7 << 4)
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#define CS4265_SIG_SEL 0x6
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#define CS4265_SIG_SEL_LOOP (1 << 1)
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#define CS4265_CHB_PGA_CTL 0x7
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#define CS4265_CHA_PGA_CTL 0x8
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#define CS4265_ADC_CTL2 0x9
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#define CS4265_DAC_CHA_VOL 0xA
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#define CS4265_DAC_CHB_VOL 0xB
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#define CS4265_DAC_CTL2 0xC
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#define CS4265_INT_STATUS 0xD
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#define CS4265_INT_MASK 0xE
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#define CS4265_STATUS_MODE_MSB 0xF
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#define CS4265_STATUS_MODE_LSB 0x10
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#define CS4265_SPDIF_CTL1 0x11
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#define CS4265_SPDIF_CTL2 0x12
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#define CS4265_SPDIF_CTL2_MUTE (1 << 4)
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#define CS4265_SPDIF_CTL2_DIF (3 << 6)
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#define CS4265_C_DATA_BUFF 0x13
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#define CS4265_MAX_REGISTER 0x2A
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#endif
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