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648c7fb16f
Make the architecture-optimized CRC code do its CPU feature checks in subsys_initcalls instead of arch_initcalls. This makes it consistent with arch/*/lib/crypto/ and ensures that it runs after initcalls that possibly could be a prerequisite for kernel-mode FPU, such as x86's xfd_update_static_branch() and loongarch's init_euen_mask(). Note: as far as I can tell, x86's xfd_update_static_branch() isn't *actually* needed for kernel-mode FPU. loongarch's init_euen_mask() is needed to enable save/restore of the vector registers, but loongarch doesn't yet have any CRC or crypto code that uses vector registers anyway. Regardless, let's be consistent with arch/*/lib/crypto/ and robust against any potential future dependency on an arch_initcall. Link: https://lore.kernel.org/r/20250510035959.87995-1-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@google.com>
93 lines
2.1 KiB
C
93 lines
2.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/* CRC32c (Castagnoli), sparc64 crc32c opcode accelerated
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*
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* This is based largely upon arch/x86/crypto/crc32c-intel.c
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*
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* Copyright (C) 2008 Intel Corporation
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* Authors: Austin Zhang <austin_zhang@linux.intel.com>
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* Kent Liu <kent.liu@intel.com>
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/crc32.h>
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#include <asm/pstate.h>
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#include <asm/elf.h>
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static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_crc32c_opcode);
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u32 crc32_le_arch(u32 crc, const u8 *data, size_t len)
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{
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return crc32_le_base(crc, data, len);
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}
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EXPORT_SYMBOL(crc32_le_arch);
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void crc32c_sparc64(u32 *crcp, const u64 *data, size_t len);
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u32 crc32c_arch(u32 crc, const u8 *data, size_t len)
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{
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size_t n = -(uintptr_t)data & 7;
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if (!static_branch_likely(&have_crc32c_opcode))
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return crc32c_base(crc, data, len);
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if (n) {
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/* Data isn't 8-byte aligned. Align it. */
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n = min(n, len);
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crc = crc32c_base(crc, data, n);
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data += n;
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len -= n;
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}
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n = len & ~7U;
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if (n) {
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crc32c_sparc64(&crc, (const u64 *)data, n);
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data += n;
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len -= n;
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}
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if (len)
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crc = crc32c_base(crc, data, len);
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return crc;
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}
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EXPORT_SYMBOL(crc32c_arch);
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u32 crc32_be_arch(u32 crc, const u8 *data, size_t len)
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{
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return crc32_be_base(crc, data, len);
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}
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EXPORT_SYMBOL(crc32_be_arch);
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static int __init crc32_sparc_init(void)
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{
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unsigned long cfr;
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if (!(sparc64_elf_hwcap & HWCAP_SPARC_CRYPTO))
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return 0;
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__asm__ __volatile__("rd %%asr26, %0" : "=r" (cfr));
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if (!(cfr & CFR_CRC32C))
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return 0;
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static_branch_enable(&have_crc32c_opcode);
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pr_info("Using sparc64 crc32c opcode optimized CRC32C implementation\n");
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return 0;
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}
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subsys_initcall(crc32_sparc_init);
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static void __exit crc32_sparc_exit(void)
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{
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}
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module_exit(crc32_sparc_exit);
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u32 crc32_optimizations(void)
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{
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if (static_key_enabled(&have_crc32c_opcode))
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return CRC32C_OPTIMIZATION;
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return 0;
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}
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EXPORT_SYMBOL(crc32_optimizations);
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("CRC32c (Castagnoli), sparc64 crc32c opcode accelerated");
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