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6b6378355b
Implement huge KVA mapping interfaces on x86. On x86, MTRRs can override PAT memory types with a 4KB granularity. When using a huge page, MTRRs can override the memory type of the huge page, which may lead a performance penalty. The processor can also behave in an undefined manner if a huge page is mapped to a memory range that MTRRs have mapped with multiple different memory types. Therefore, the mapping code falls back to use a smaller page size toward 4KB when a mapping range is covered by non-WB type of MTRRs. The WB type of MTRRs has no affect on the PAT memory types. pud_set_huge() and pmd_set_huge() call mtrr_type_lookup() to see if a given range is covered by MTRRs. MTRR_TYPE_WRBACK indicates that the range is either covered by WB or not covered and the MTRR default value is set to WB. 0xFF indicates that MTRRs are disabled. HAVE_ARCH_HUGE_VMAP is selected when X86_64 or X86_32 with X86_PAE is set. X86_32 without X86_PAE is not supported since such config can unlikey be benefited from this feature, and there was an issue found in testing. [fengguang.wu@intel.com: ioremap_pud_capable can be static] Signed-off-by: Toshi Kani <toshi.kani@hp.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Dave Hansen <dave.hansen@intel.com> Cc: Robert Elliott <Elliott@hp.com> Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
147 lines
3.4 KiB
C
147 lines
3.4 KiB
C
/*
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* Re-map IO memory to kernel address space so that we can access it.
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* This is needed for high PCI addresses that aren't mapped in the
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* 640k-1MB IO memory area on PC's
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*
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* (C) Copyright 1995 1996 Linus Torvalds
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*/
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#include <linux/vmalloc.h>
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#include <linux/mm.h>
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#include <linux/sched.h>
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#include <linux/io.h>
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#include <linux/export.h>
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#include <asm/cacheflush.h>
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#include <asm/pgtable.h>
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#ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
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static int __read_mostly ioremap_pud_capable;
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static int __read_mostly ioremap_pmd_capable;
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static int __read_mostly ioremap_huge_disabled;
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static int __init set_nohugeiomap(char *str)
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{
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ioremap_huge_disabled = 1;
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return 0;
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}
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early_param("nohugeiomap", set_nohugeiomap);
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void __init ioremap_huge_init(void)
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{
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if (!ioremap_huge_disabled) {
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if (arch_ioremap_pud_supported())
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ioremap_pud_capable = 1;
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if (arch_ioremap_pmd_supported())
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ioremap_pmd_capable = 1;
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}
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}
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static inline int ioremap_pud_enabled(void)
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{
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return ioremap_pud_capable;
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}
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static inline int ioremap_pmd_enabled(void)
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{
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return ioremap_pmd_capable;
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}
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#else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */
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static inline int ioremap_pud_enabled(void) { return 0; }
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static inline int ioremap_pmd_enabled(void) { return 0; }
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#endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
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static int ioremap_pte_range(pmd_t *pmd, unsigned long addr,
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unsigned long end, phys_addr_t phys_addr, pgprot_t prot)
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{
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pte_t *pte;
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u64 pfn;
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pfn = phys_addr >> PAGE_SHIFT;
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pte = pte_alloc_kernel(pmd, addr);
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if (!pte)
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return -ENOMEM;
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do {
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BUG_ON(!pte_none(*pte));
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set_pte_at(&init_mm, addr, pte, pfn_pte(pfn, prot));
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pfn++;
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} while (pte++, addr += PAGE_SIZE, addr != end);
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return 0;
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}
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static inline int ioremap_pmd_range(pud_t *pud, unsigned long addr,
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unsigned long end, phys_addr_t phys_addr, pgprot_t prot)
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{
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pmd_t *pmd;
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unsigned long next;
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phys_addr -= addr;
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pmd = pmd_alloc(&init_mm, pud, addr);
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if (!pmd)
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return -ENOMEM;
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do {
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next = pmd_addr_end(addr, end);
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if (ioremap_pmd_enabled() &&
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((next - addr) == PMD_SIZE) &&
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IS_ALIGNED(phys_addr + addr, PMD_SIZE)) {
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if (pmd_set_huge(pmd, phys_addr + addr, prot))
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continue;
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}
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if (ioremap_pte_range(pmd, addr, next, phys_addr + addr, prot))
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return -ENOMEM;
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} while (pmd++, addr = next, addr != end);
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return 0;
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}
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static inline int ioremap_pud_range(pgd_t *pgd, unsigned long addr,
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unsigned long end, phys_addr_t phys_addr, pgprot_t prot)
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{
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pud_t *pud;
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unsigned long next;
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phys_addr -= addr;
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pud = pud_alloc(&init_mm, pgd, addr);
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if (!pud)
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return -ENOMEM;
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do {
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next = pud_addr_end(addr, end);
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if (ioremap_pud_enabled() &&
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((next - addr) == PUD_SIZE) &&
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IS_ALIGNED(phys_addr + addr, PUD_SIZE)) {
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if (pud_set_huge(pud, phys_addr + addr, prot))
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continue;
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}
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if (ioremap_pmd_range(pud, addr, next, phys_addr + addr, prot))
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return -ENOMEM;
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} while (pud++, addr = next, addr != end);
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return 0;
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}
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int ioremap_page_range(unsigned long addr,
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unsigned long end, phys_addr_t phys_addr, pgprot_t prot)
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{
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pgd_t *pgd;
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unsigned long start;
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unsigned long next;
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int err;
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BUG_ON(addr >= end);
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start = addr;
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phys_addr -= addr;
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pgd = pgd_offset_k(addr);
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do {
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next = pgd_addr_end(addr, end);
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err = ioremap_pud_range(pgd, addr, next, phys_addr+addr, prot);
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if (err)
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break;
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} while (pgd++, addr = next, addr != end);
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flush_cache_vmap(start, end);
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return err;
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}
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EXPORT_SYMBOL_GPL(ioremap_page_range);
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