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	Multiple displays may be connected to the same bus and share a D/C GPIO, so the display driver needs exclusive access to the bus to ensure that it can control the D/C GPIO safely. Signed-off-by: Otto Pflüger <otto.pflueger@abscue.de> Reviewed-by: Noralf Trønnes <noralf@tronnes.org> Acked-by: David Lechner <david@lechnology.com> Signed-off-by: Noralf Trønnes <noralf@tronnes.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230724065654.5269-2-otto.pflueger@abscue.de
		
			
				
	
	
		
			282 lines
		
	
	
	
		
			7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			282 lines
		
	
	
	
		
			7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
// SPDX-License-Identifier: GPL-2.0+
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/*
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 * DRM driver for Ilitek ILI9486 panels
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 *
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 * Copyright 2020 Kamlesh Gurudasani <kamlesh.gurudasani@gmail.com>
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 */
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#include <linux/backlight.h>
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#include <linux/delay.h>
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#include <linux/gpio/consumer.h>
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#include <linux/module.h>
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#include <linux/property.h>
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#include <linux/spi/spi.h>
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#include <video/mipi_display.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_drv.h>
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#include <drm/drm_fbdev_generic.h>
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#include <drm/drm_gem_atomic_helper.h>
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#include <drm/drm_gem_dma_helper.h>
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#include <drm/drm_managed.h>
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#include <drm/drm_mipi_dbi.h>
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#include <drm/drm_modeset_helper.h>
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#define ILI9486_ITFCTR1         0xb0
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#define ILI9486_PWCTRL1         0xc2
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#define ILI9486_VMCTRL1         0xc5
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#define ILI9486_PGAMCTRL        0xe0
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#define ILI9486_NGAMCTRL        0xe1
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#define ILI9486_DGAMCTRL        0xe2
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#define ILI9486_MADCTL_BGR      BIT(3)
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#define ILI9486_MADCTL_MV       BIT(5)
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#define ILI9486_MADCTL_MX       BIT(6)
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#define ILI9486_MADCTL_MY       BIT(7)
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/*
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 * The PiScreen/waveshare rpi-lcd-35 has a SPI to 16-bit parallel bus converter
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 * in front of the  display controller. This means that 8-bit values have to be
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 * transferred as 16-bit.
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 */
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static int waveshare_command(struct mipi_dbi *mipi, u8 *cmd, u8 *par,
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			     size_t num)
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{
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	struct spi_device *spi = mipi->spi;
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	unsigned int bpw = 8;
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	void *data = par;
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	u32 speed_hz;
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	int i, ret;
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	__be16 *buf;
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	buf = kmalloc(32 * sizeof(u16), GFP_KERNEL);
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	if (!buf)
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		return -ENOMEM;
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	/*
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	 * The displays are Raspberry Pi HATs and connected to the 8-bit only
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	 * SPI controller, so 16-bit command and parameters need byte swapping
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	 * before being transferred as 8-bit on the big endian SPI bus.
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	 */
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	buf[0] = cpu_to_be16(*cmd);
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	spi_bus_lock(spi->controller);
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	gpiod_set_value_cansleep(mipi->dc, 0);
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	speed_hz = mipi_dbi_spi_cmd_max_speed(spi, 2);
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	ret = mipi_dbi_spi_transfer(spi, speed_hz, 8, buf, 2);
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	spi_bus_unlock(spi->controller);
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	if (ret || !num)
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		goto free;
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	/* 8-bit configuration data, not 16-bit pixel data */
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	if (num <= 32) {
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		for (i = 0; i < num; i++)
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			buf[i] = cpu_to_be16(par[i]);
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		num *= 2;
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		data = buf;
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	}
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	/*
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	 * Check whether pixel data bytes needs to be swapped or not
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	 */
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	if (*cmd == MIPI_DCS_WRITE_MEMORY_START && !mipi->swap_bytes)
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		bpw = 16;
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	spi_bus_lock(spi->controller);
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	gpiod_set_value_cansleep(mipi->dc, 1);
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	speed_hz = mipi_dbi_spi_cmd_max_speed(spi, num);
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	ret = mipi_dbi_spi_transfer(spi, speed_hz, bpw, data, num);
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	spi_bus_unlock(spi->controller);
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 free:
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	kfree(buf);
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	return ret;
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}
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static void waveshare_enable(struct drm_simple_display_pipe *pipe,
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			     struct drm_crtc_state *crtc_state,
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			     struct drm_plane_state *plane_state)
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{
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	struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);
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	struct mipi_dbi *dbi = &dbidev->dbi;
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	u8 addr_mode;
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	int ret, idx;
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	if (!drm_dev_enter(pipe->crtc.dev, &idx))
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		return;
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	DRM_DEBUG_KMS("\n");
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	ret = mipi_dbi_poweron_conditional_reset(dbidev);
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	if (ret < 0)
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		goto out_exit;
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	if (ret == 1)
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		goto out_enable;
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	mipi_dbi_command(dbi, ILI9486_ITFCTR1);
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	mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
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	msleep(250);
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	mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT, 0x55);
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	mipi_dbi_command(dbi, ILI9486_PWCTRL1, 0x44);
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	mipi_dbi_command(dbi, ILI9486_VMCTRL1, 0x00, 0x00, 0x00, 0x00);
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	mipi_dbi_command(dbi, ILI9486_PGAMCTRL,
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			 0x0F, 0x1F, 0x1C, 0x0C, 0x0F, 0x08, 0x48, 0x98,
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			 0x37, 0x0A, 0x13, 0x04, 0x11, 0x0D, 0x0);
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	mipi_dbi_command(dbi, ILI9486_NGAMCTRL,
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			 0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75,
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			 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00);
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	mipi_dbi_command(dbi, ILI9486_DGAMCTRL,
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			 0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75,
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			 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00);
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	mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
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	msleep(100);
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 out_enable:
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	switch (dbidev->rotation) {
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	case 90:
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		addr_mode = ILI9486_MADCTL_MY;
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		break;
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	case 180:
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		addr_mode = ILI9486_MADCTL_MV;
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		break;
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	case 270:
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		addr_mode = ILI9486_MADCTL_MX;
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		break;
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	default:
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		addr_mode = ILI9486_MADCTL_MV | ILI9486_MADCTL_MY |
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			ILI9486_MADCTL_MX;
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		break;
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	}
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	addr_mode |= ILI9486_MADCTL_BGR;
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	mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode);
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	mipi_dbi_enable_flush(dbidev, crtc_state, plane_state);
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 out_exit:
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	drm_dev_exit(idx);
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}
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static const struct drm_simple_display_pipe_funcs waveshare_pipe_funcs = {
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	DRM_MIPI_DBI_SIMPLE_DISPLAY_PIPE_FUNCS(waveshare_enable),
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};
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static const struct drm_display_mode waveshare_mode = {
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	DRM_SIMPLE_MODE(480, 320, 73, 49),
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};
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DEFINE_DRM_GEM_DMA_FOPS(ili9486_fops);
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static const struct drm_driver ili9486_driver = {
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	.driver_features	= DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
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	.fops			= &ili9486_fops,
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	DRM_GEM_DMA_DRIVER_OPS_VMAP,
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	.debugfs_init		= mipi_dbi_debugfs_init,
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	.name			= "ili9486",
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	.desc			= "Ilitek ILI9486",
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	.date			= "20200118",
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	.major			= 1,
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	.minor			= 0,
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};
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static const struct of_device_id ili9486_of_match[] = {
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	{ .compatible = "waveshare,rpi-lcd-35" },
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	{ .compatible = "ozzmaker,piscreen" },
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	{},
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};
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MODULE_DEVICE_TABLE(of, ili9486_of_match);
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static const struct spi_device_id ili9486_id[] = {
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	{ "ili9486", 0 },
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	{ "rpi-lcd-35", 0 },
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	{ "piscreen", 0 },
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	{ }
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};
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MODULE_DEVICE_TABLE(spi, ili9486_id);
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static int ili9486_probe(struct spi_device *spi)
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{
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	struct device *dev = &spi->dev;
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	struct mipi_dbi_dev *dbidev;
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	struct drm_device *drm;
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	struct mipi_dbi *dbi;
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	struct gpio_desc *dc;
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	u32 rotation = 0;
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	int ret;
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	dbidev = devm_drm_dev_alloc(dev, &ili9486_driver,
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				    struct mipi_dbi_dev, drm);
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	if (IS_ERR(dbidev))
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		return PTR_ERR(dbidev);
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	dbi = &dbidev->dbi;
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	drm = &dbidev->drm;
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	dbi->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
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	if (IS_ERR(dbi->reset))
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		return dev_err_probe(dev, PTR_ERR(dbi->reset), "Failed to get GPIO 'reset'\n");
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	dc = devm_gpiod_get(dev, "dc", GPIOD_OUT_LOW);
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	if (IS_ERR(dc))
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		return dev_err_probe(dev, PTR_ERR(dc), "Failed to get GPIO 'dc'\n");
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	dbidev->backlight = devm_of_find_backlight(dev);
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	if (IS_ERR(dbidev->backlight))
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		return PTR_ERR(dbidev->backlight);
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	device_property_read_u32(dev, "rotation", &rotation);
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	ret = mipi_dbi_spi_init(spi, dbi, dc);
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	if (ret)
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		return ret;
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	dbi->command = waveshare_command;
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	dbi->read_commands = NULL;
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	ret = mipi_dbi_dev_init(dbidev, &waveshare_pipe_funcs,
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				&waveshare_mode, rotation);
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	if (ret)
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		return ret;
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	drm_mode_config_reset(drm);
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	ret = drm_dev_register(drm, 0);
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	if (ret)
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		return ret;
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	spi_set_drvdata(spi, drm);
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	drm_fbdev_generic_setup(drm, 0);
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	return 0;
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}
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static void ili9486_remove(struct spi_device *spi)
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{
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	struct drm_device *drm = spi_get_drvdata(spi);
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	drm_dev_unplug(drm);
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	drm_atomic_helper_shutdown(drm);
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}
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static void ili9486_shutdown(struct spi_device *spi)
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{
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	drm_atomic_helper_shutdown(spi_get_drvdata(spi));
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}
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static struct spi_driver ili9486_spi_driver = {
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	.driver = {
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		.name = "ili9486",
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		.of_match_table = ili9486_of_match,
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	},
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	.id_table = ili9486_id,
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	.probe = ili9486_probe,
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	.remove = ili9486_remove,
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	.shutdown = ili9486_shutdown,
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};
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module_spi_driver(ili9486_spi_driver);
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MODULE_DESCRIPTION("Ilitek ILI9486 DRM driver");
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MODULE_AUTHOR("Kamlesh Gurudasani <kamlesh.gurudasani@gmail.com>");
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MODULE_LICENSE("GPL");
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