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0953fb2637
Now that entry code handles IRQ entry (including setting the IRQ regs)
before calling irqchip code, irqchip code can safely call
generic_handle_domain_irq(), and there's no functional reason for it to
call handle_domain_irq().
Let's cement this split of responsibility and remove handle_domain_irq()
entirely, updating irqchip drivers to call generic_handle_domain_irq().
For consistency, handle_domain_nmi() is similarly removed and replaced
with a generic_handle_domain_nmi() function which also does not perform
any entry logic.
Previously handle_domain_{irq,nmi}() had a WARN_ON() which would fire
when they were called in an inappropriate context. So that we can
identify similar issues going forward, similar WARN_ON_ONCE() logic is
added to the generic_handle_*() functions, and comments are updated for
clarity and consistency.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
107 lines
2.5 KiB
C
107 lines
2.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* RDA8810PL SoC irqchip driver
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*
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* Copyright RDA Microelectronics Company Limited
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* Copyright (c) 2017 Andreas Färber
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* Copyright (c) 2018 Manivannan Sadhasivam
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*/
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irqchip.h>
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#include <linux/irqdomain.h>
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#include <linux/of_address.h>
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#include <asm/exception.h>
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#define RDA_INTC_FINALSTATUS 0x00
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#define RDA_INTC_MASK_SET 0x08
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#define RDA_INTC_MASK_CLR 0x0c
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#define RDA_IRQ_MASK_ALL 0xFFFFFFFF
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#define RDA_NR_IRQS 32
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static void __iomem *rda_intc_base;
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static struct irq_domain *rda_irq_domain;
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static void rda_intc_mask_irq(struct irq_data *d)
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{
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writel_relaxed(BIT(d->hwirq), rda_intc_base + RDA_INTC_MASK_CLR);
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}
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static void rda_intc_unmask_irq(struct irq_data *d)
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{
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writel_relaxed(BIT(d->hwirq), rda_intc_base + RDA_INTC_MASK_SET);
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}
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static int rda_intc_set_type(struct irq_data *data, unsigned int flow_type)
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{
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/* Hardware supports only level triggered interrupts */
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if ((flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) == flow_type)
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return 0;
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return -EINVAL;
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}
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static void __exception_irq_entry rda_handle_irq(struct pt_regs *regs)
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{
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u32 stat = readl_relaxed(rda_intc_base + RDA_INTC_FINALSTATUS);
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u32 hwirq;
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while (stat) {
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hwirq = __fls(stat);
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generic_handle_domain_irq(rda_irq_domain, hwirq);
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stat &= ~BIT(hwirq);
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}
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}
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static struct irq_chip rda_irq_chip = {
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.name = "rda-intc",
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.irq_mask = rda_intc_mask_irq,
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.irq_unmask = rda_intc_unmask_irq,
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.irq_set_type = rda_intc_set_type,
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};
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static int rda_irq_map(struct irq_domain *d,
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unsigned int virq, irq_hw_number_t hw)
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{
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irq_set_status_flags(virq, IRQ_LEVEL);
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irq_set_chip_and_handler(virq, &rda_irq_chip, handle_level_irq);
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irq_set_chip_data(virq, d->host_data);
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irq_set_probe(virq);
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return 0;
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}
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static const struct irq_domain_ops rda_irq_domain_ops = {
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.map = rda_irq_map,
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.xlate = irq_domain_xlate_onecell,
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};
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static int __init rda8810_intc_init(struct device_node *node,
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struct device_node *parent)
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{
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rda_intc_base = of_io_request_and_map(node, 0, "rda-intc");
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if (IS_ERR(rda_intc_base))
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return PTR_ERR(rda_intc_base);
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/* Mask all interrupt sources */
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writel_relaxed(RDA_IRQ_MASK_ALL, rda_intc_base + RDA_INTC_MASK_CLR);
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rda_irq_domain = irq_domain_create_linear(&node->fwnode, RDA_NR_IRQS,
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&rda_irq_domain_ops,
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rda_intc_base);
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if (!rda_irq_domain) {
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iounmap(rda_intc_base);
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return -ENOMEM;
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}
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set_handle_irq(rda_handle_irq);
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return 0;
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}
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IRQCHIP_DECLARE(rda_intc, "rda,8810pl-intc", rda8810_intc_init);
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