Palmer Dabbelt 4202f62cb6 Merge patch series "riscv: Create and document PR_RISCV_SET_ICACHE_FLUSH_CTX prctl" ... Charlie Jenkins <charlie@rivosinc.com> says: Improve the performance of icache flushing by creating a new prctl flag PR_RISCV_SET_ICACHE_FLUSH_CTX. The interface is left generic to allow for future expansions such as with the proposed J extension [1]. Documentation is also provided to explain the use case. Patch sent to add PR_RISCV_SET_ICACHE_FLUSH_CTX to man-pages [2]. [1] https://github.com/riscv/riscv-j-extension [2] https://lore.kernel.org/linux-man/20240124-fencei_prctl-v1-1-0bddafcef331@rivosinc.com * b4-shazam-merge: cpumask: Add assign cpu documentation: Document PR_RISCV_SET_ICACHE_FLUSH_CTX prctl riscv: Include riscv_set_icache_flush_ctx prctl riscv: Remove unnecessary irqflags processor.h include Link: https://lore.kernel.org/r/20240312-fencei-v13-0-4b6bdc2bbf32@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>		2024-04-30 10:35:42 -07:00
..
acpi.rst
boot-image-header.rst
boot.rst
cmodx.rst	documentation: Document PR_RISCV_SET_ICACHE_FLUSH_CTX prctl	2024-04-18 08:10:59 -07:00
features.rst	docs: kernel_feat.py: fix potential command injection	2024-01-11 09:21:01 -07:00
hwprobe.rst	riscv: hwprobe: export Zihintpause ISA extension	2024-04-28 14:50:38 -07:00
index.rst	documentation: Document PR_RISCV_SET_ICACHE_FLUSH_CTX prctl	2024-04-18 08:10:59 -07:00
patch-acceptance.rst
uabi.rst
vector.rst
vm-layout.rst	docs: riscv: Define behavior of mmap	2024-03-14 08:46:15 -07:00