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- Setup the shift and mask of HDMI_ACP_SEND register - Program the register in hdmi stream encoder - Also update ACP register in azalia configuration Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alan Liu <HaoPing.Liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
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| .. | ||
| dce_6_0_d.h | ||
| dce_6_0_sh_mask.h | ||
| dce_8_0_d.h | ||
| dce_8_0_enum.h | ||
| dce_8_0_sh_mask.h | ||
| dce_10_0_d.h | ||
| dce_10_0_enum.h | ||
| dce_10_0_sh_mask.h | ||
| dce_11_0_d.h | ||
| dce_11_0_enum.h | ||
| dce_11_0_sh_mask.h | ||
| dce_11_2_d.h | ||
| dce_11_2_enum.h | ||
| dce_11_2_sh_mask.h | ||
| dce_12_0_offset.h | ||
| dce_12_0_sh_mask.h | ||