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820845ce37
Change the default register settings for Gen7 to mach Gen4 and later. Gen7 currently uses the settings for Gen1, which is most likely incorrect. Using Gen4+ settings enables E2M linear-access modes in VGACRA2. It appears to be related to the chip's PCIE2MBOX feature, which is unused. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://lore.kernel.org/r/20250706162816.211552-11-tzimmermann@suse.de
50 lines
1.2 KiB
C
50 lines
1.2 KiB
C
/* SPDX-License-Identifier: MIT */
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#ifndef AST_POST_H
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#define AST_POST_H
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#include <linux/limits.h>
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#include <linux/types.h>
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struct ast_device;
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/* DRAM timing tables */
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struct ast_dramstruct {
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u16 index;
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u32 data;
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};
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/* hardware fields */
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#define __AST_DRAMSTRUCT_DRAM_TYPE 0x0004
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/* control commands */
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#define __AST_DRAMSTRUCT_UDELAY 0xff00
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#define __AST_DRAMSTRUCT_INVALID 0xffff
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#define __AST_DRAMSTRUCT_INDEX(_name) \
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(__AST_DRAMSTRUCT_ ## _name)
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#define AST_DRAMSTRUCT_INIT(_name, _value) \
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{ __AST_DRAMSTRUCT_INDEX(_name), (_value) }
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#define AST_DRAMSTRUCT_UDELAY(_usecs) \
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AST_DRAMSTRUCT_INIT(UDELAY, _usecs)
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#define AST_DRAMSTRUCT_INVALID \
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AST_DRAMSTRUCT_INIT(INVALID, U32_MAX)
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#define AST_DRAMSTRUCT_IS(_entry, _name) \
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((_entry)->index == __AST_DRAMSTRUCT_INDEX(_name))
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u32 __ast_mindwm(void __iomem *regs, u32 r);
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void __ast_moutdwm(void __iomem *regs, u32 r, u32 v);
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bool mmc_test(struct ast_device *ast, u32 datagen, u8 test_ctl);
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bool mmc_test_burst(struct ast_device *ast, u32 datagen);
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/* ast_2000.c */
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void ast_2000_set_def_ext_reg(struct ast_device *ast);
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/* ast_2300.c */
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void ast_2300_set_def_ext_reg(struct ast_device *ast);
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#endif
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