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	Return an error code on failure. Problem found using Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: kernel-janitors@vger.kernel.org Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: linux-arm-kernel@lists.infradead.org Link: https://lkml.kernel.org/r1528640655-18948-3-git-send-email-Julia.Lawall@lip6.fr
		
			
				
	
	
		
			336 lines
		
	
	
	
		
			8.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			336 lines
		
	
	
	
		
			8.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Copyright (C) Maxime Coquelin 2015
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 * Author:  Maxime Coquelin <mcoquelin.stm32@gmail.com>
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 * License terms:  GNU General Public License (GPL), version 2
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 *
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 * Inspired by time-efm32.c from Uwe Kleine-Koenig
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 */
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#include <linux/kernel.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/clk.h>
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#include <linux/reset.h>
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#include <linux/sched_clock.h>
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#include <linux/slab.h>
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#include "timer-of.h"
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#define TIM_CR1		0x00
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#define TIM_DIER	0x0c
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#define TIM_SR		0x10
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#define TIM_EGR		0x14
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#define TIM_CNT		0x24
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#define TIM_PSC		0x28
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#define TIM_ARR		0x2c
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#define TIM_CCR1	0x34
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#define TIM_CR1_CEN	BIT(0)
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#define TIM_CR1_UDIS	BIT(1)
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#define TIM_CR1_OPM	BIT(3)
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#define TIM_CR1_ARPE	BIT(7)
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#define TIM_DIER_UIE	BIT(0)
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#define TIM_DIER_CC1IE	BIT(1)
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#define TIM_SR_UIF	BIT(0)
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#define TIM_EGR_UG	BIT(0)
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#define TIM_PSC_MAX	USHRT_MAX
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#define TIM_PSC_CLKRATE	10000
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struct stm32_timer_private {
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	int bits;
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};
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/**
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 * stm32_timer_of_bits_set - set accessor helper
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 * @to: a timer_of structure pointer
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 * @bits: the number of bits (16 or 32)
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 *
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 * Accessor helper to set the number of bits in the timer-of private
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 * structure.
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 *
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 */
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static void stm32_timer_of_bits_set(struct timer_of *to, int bits)
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{
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	struct stm32_timer_private *pd = to->private_data;
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	pd->bits = bits;
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}
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/**
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 * stm32_timer_of_bits_get - get accessor helper
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 * @to: a timer_of structure pointer
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 *
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 * Accessor helper to get the number of bits in the timer-of private
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 * structure.
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 *
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 * Returns an integer corresponding to the number of bits.
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 */
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static int stm32_timer_of_bits_get(struct timer_of *to)
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{
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	struct stm32_timer_private *pd = to->private_data;
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	return pd->bits;
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}
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static void __iomem *stm32_timer_cnt __read_mostly;
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static u64 notrace stm32_read_sched_clock(void)
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{
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	return readl_relaxed(stm32_timer_cnt);
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}
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static struct delay_timer stm32_timer_delay;
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static unsigned long stm32_read_delay(void)
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{
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	return readl_relaxed(stm32_timer_cnt);
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}
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static void stm32_clock_event_disable(struct timer_of *to)
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{
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	writel_relaxed(0, timer_of_base(to) + TIM_DIER);
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}
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/**
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 * stm32_timer_start - Start the counter without event
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 * @to: a timer_of structure pointer
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 *
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 * Start the timer in order to have the counter reset and start
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 * incrementing but disable interrupt event when there is a counter
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 * overflow. By default, the counter direction is used as upcounter.
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 */
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static void stm32_timer_start(struct timer_of *to)
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{
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	writel_relaxed(TIM_CR1_UDIS | TIM_CR1_CEN, timer_of_base(to) + TIM_CR1);
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}
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static int stm32_clock_event_shutdown(struct clock_event_device *clkevt)
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{
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	struct timer_of *to = to_timer_of(clkevt);
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	stm32_clock_event_disable(to);
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	return 0;
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}
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static int stm32_clock_event_set_next_event(unsigned long evt,
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					    struct clock_event_device *clkevt)
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{
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	struct timer_of *to = to_timer_of(clkevt);
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	unsigned long now, next;
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	next = readl_relaxed(timer_of_base(to) + TIM_CNT) + evt;
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	writel_relaxed(next, timer_of_base(to) + TIM_CCR1);
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	now = readl_relaxed(timer_of_base(to) + TIM_CNT);
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	if ((next - now) > evt)
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		return -ETIME;
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	writel_relaxed(TIM_DIER_CC1IE, timer_of_base(to) + TIM_DIER);
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	return 0;
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}
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static int stm32_clock_event_set_periodic(struct clock_event_device *clkevt)
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{
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	struct timer_of *to = to_timer_of(clkevt);
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	stm32_timer_start(to);
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	return stm32_clock_event_set_next_event(timer_of_period(to), clkevt);
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}
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static int stm32_clock_event_set_oneshot(struct clock_event_device *clkevt)
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{
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	struct timer_of *to = to_timer_of(clkevt);
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	stm32_timer_start(to);
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	return 0;
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}
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static irqreturn_t stm32_clock_event_handler(int irq, void *dev_id)
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{
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	struct clock_event_device *clkevt = (struct clock_event_device *)dev_id;
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	struct timer_of *to = to_timer_of(clkevt);
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	writel_relaxed(0, timer_of_base(to) + TIM_SR);
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	if (clockevent_state_periodic(clkevt))
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		stm32_clock_event_set_periodic(clkevt);
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	else
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		stm32_clock_event_shutdown(clkevt);
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	clkevt->event_handler(clkevt);
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	return IRQ_HANDLED;
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}
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/**
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 * stm32_timer_width - Sort out the timer width (32/16)
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 * @to: a pointer to a timer-of structure
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 *
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 * Write the 32-bit max value and read/return the result. If the timer
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 * is 32 bits wide, the result will be UINT_MAX, otherwise it will
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 * be truncated by the 16-bit register to USHRT_MAX.
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 *
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 */
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static void __init stm32_timer_set_width(struct timer_of *to)
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{
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	u32 width;
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	writel_relaxed(UINT_MAX, timer_of_base(to) + TIM_ARR);
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	width = readl_relaxed(timer_of_base(to) + TIM_ARR);
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	stm32_timer_of_bits_set(to, width == UINT_MAX ? 32 : 16);
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}
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/**
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 * stm32_timer_set_prescaler - Compute and set the prescaler register
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 * @to: a pointer to a timer-of structure
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 *
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 * Depending on the timer width, compute the prescaler to always
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 * target a 10MHz timer rate for 16 bits. 32-bit timers are
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 * considered precise and long enough to not use the prescaler.
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 */
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static void __init stm32_timer_set_prescaler(struct timer_of *to)
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{
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	int prescaler = 1;
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	if (stm32_timer_of_bits_get(to) != 32) {
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		prescaler = DIV_ROUND_CLOSEST(timer_of_rate(to),
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					      TIM_PSC_CLKRATE);
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		/*
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		 * The prescaler register is an u16, the variable
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		 * can't be greater than TIM_PSC_MAX, let's cap it in
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		 * this case.
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		 */
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		prescaler = prescaler < TIM_PSC_MAX ? prescaler : TIM_PSC_MAX;
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	}
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	writel_relaxed(prescaler - 1, timer_of_base(to) + TIM_PSC);
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	writel_relaxed(TIM_EGR_UG, timer_of_base(to) + TIM_EGR);
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	writel_relaxed(0, timer_of_base(to) + TIM_SR);
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	/* Adjust rate and period given the prescaler value */
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	to->of_clk.rate = DIV_ROUND_CLOSEST(to->of_clk.rate, prescaler);
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	to->of_clk.period = DIV_ROUND_UP(to->of_clk.rate, HZ);
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}
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static int __init stm32_clocksource_init(struct timer_of *to)
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{
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        u32 bits = stm32_timer_of_bits_get(to);
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	const char *name = to->np->full_name;
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	/*
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	 * This driver allows to register several timers and relies on
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	 * the generic time framework to select the right one.
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	 * However, nothing allows to do the same for the
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	 * sched_clock. We are not interested in a sched_clock for the
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	 * 16-bit timers but only for the 32-bit one, so if no 32-bit
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	 * timer is registered yet, we select this 32-bit timer as a
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	 * sched_clock.
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	 */
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	if (bits == 32 && !stm32_timer_cnt) {
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		/*
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		 * Start immediately the counter as we will be using
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		 * it right after.
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		 */
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		stm32_timer_start(to);
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		stm32_timer_cnt = timer_of_base(to) + TIM_CNT;
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		sched_clock_register(stm32_read_sched_clock, bits, timer_of_rate(to));
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		pr_info("%s: STM32 sched_clock registered\n", name);
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		stm32_timer_delay.read_current_timer = stm32_read_delay;
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		stm32_timer_delay.freq = timer_of_rate(to);
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		register_current_timer_delay(&stm32_timer_delay);
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		pr_info("%s: STM32 delay timer registered\n", name);
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	}
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	return clocksource_mmio_init(timer_of_base(to) + TIM_CNT, name,
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				     timer_of_rate(to), bits == 32 ? 250 : 100,
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				     bits, clocksource_mmio_readl_up);
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}
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static void __init stm32_clockevent_init(struct timer_of *to)
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{
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	u32 bits = stm32_timer_of_bits_get(to);
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	to->clkevt.name = to->np->full_name;
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	to->clkevt.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
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	to->clkevt.set_state_shutdown = stm32_clock_event_shutdown;
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	to->clkevt.set_state_periodic = stm32_clock_event_set_periodic;
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	to->clkevt.set_state_oneshot = stm32_clock_event_set_oneshot;
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	to->clkevt.tick_resume = stm32_clock_event_shutdown;
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	to->clkevt.set_next_event = stm32_clock_event_set_next_event;
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	to->clkevt.rating = bits == 32 ? 250 : 100;
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	clockevents_config_and_register(&to->clkevt, timer_of_rate(to), 0x1,
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					(1 <<  bits) - 1);
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	pr_info("%pOF: STM32 clockevent driver initialized (%d bits)\n",
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		to->np, bits);
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}
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static int __init stm32_timer_init(struct device_node *node)
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{
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	struct reset_control *rstc;
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	struct timer_of *to;
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	int ret;
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	to = kzalloc(sizeof(*to), GFP_KERNEL);
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	if (!to)
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		return -ENOMEM;
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	to->flags = TIMER_OF_IRQ | TIMER_OF_CLOCK | TIMER_OF_BASE;
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	to->of_irq.handler = stm32_clock_event_handler;
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	ret = timer_of_init(node, to);
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	if (ret)
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		goto err;
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	to->private_data = kzalloc(sizeof(struct stm32_timer_private),
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				   GFP_KERNEL);
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	if (!to->private_data) {
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		ret = -ENOMEM;
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		goto deinit;
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	}
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	rstc = of_reset_control_get(node, NULL);
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	if (!IS_ERR(rstc)) {
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		reset_control_assert(rstc);
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		reset_control_deassert(rstc);
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	}
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	stm32_timer_set_width(to);
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	stm32_timer_set_prescaler(to);
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	ret = stm32_clocksource_init(to);
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	if (ret)
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		goto deinit;
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	stm32_clockevent_init(to);
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	return 0;
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deinit:
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	timer_of_cleanup(to);
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err:
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	kfree(to);
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	return ret;
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}
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TIMER_OF_DECLARE(stm32, "st,stm32-timer", stm32_timer_init);
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