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Bug 1663327 - Fix emulation of tbl instruction. r=jseward

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The emulation must use a temporary register to avoid clobbering the
output register early.

Differential Revision: https://phabricator.services.mozilla.com/D90739
This commit is contained in:
Lars T Hansen 2020-09-21 08:59:15 +00:00
parent 9e8f061119
commit 3648bc9ef3
1 changed files with 16 additions and 8 deletions
repo.diff.show_diff_stats Download patch file Download diff file Expand all files Collapse all files

24
js/src/jit/arm64/vixl/Logic-vixl.cpp
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@ -2251,8 +2251,10 @@ LogicVRegister Simulator::tbl(VectorFormat vform,
LogicVRegister dst,
const LogicVRegister& tab,
const LogicVRegister& ind) {
movi(vform, dst, 0);
return tbx(vform, dst, tab, ind);
SimVRegister result;
movi(vform, result, 0);
tbx(vform, result, tab, ind);
return orr(vform, dst, result, result);
}
@ -2261,8 +2263,10 @@ LogicVRegister Simulator::tbl(VectorFormat vform,
const LogicVRegister& tab,
const LogicVRegister& tab2,
const LogicVRegister& ind) {
movi(vform, dst, 0);
return tbx(vform, dst, tab, tab2, ind);
SimVRegister result;
movi(vform, result, 0);
tbx(vform, result, tab, tab2, ind);
return orr(vform, dst, result, result);
}
@ -2272,8 +2276,10 @@ LogicVRegister Simulator::tbl(VectorFormat vform,
const LogicVRegister& tab2,
const LogicVRegister& tab3,
const LogicVRegister& ind) {
movi(vform, dst, 0);
return tbx(vform, dst, tab, tab2, tab3, ind);
SimVRegister result;
movi(vform, result, 0);
tbx(vform, result, tab, tab2, tab3, ind);
return orr(vform, dst, result, result);
}
@ -2284,8 +2290,10 @@ LogicVRegister Simulator::tbl(VectorFormat vform,
const LogicVRegister& tab3,
const LogicVRegister& tab4,
const LogicVRegister& ind) {
movi(vform, dst, 0);
return tbx(vform, dst, tab, tab2, tab3, tab4, ind);
SimVRegister result;
movi(vform, result, 0);
tbx(vform, result, tab, tab2, tab3, tab4, ind);
return orr(vform, dst, result, result);
}