forked from mirrors/linux
spi: spi-davinci: convert to DMA engine API
Removes use of the DaVinci EDMA private DMA API and replaces it with use of the DMA engine API. Signed-off-by: Matt Porter <mporter@ti.com> Tested-by: Tom Rini <trini@ti.com> Tested-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
This commit is contained in:
Matt Porter
Vinod Koul
parent
b5daabbd3d
commit
048177ce3b
1 changed files with 126 additions and 158 deletions
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@ -25,13 +25,14 @@
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#include <linux/platform_device.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/dmaengine.h>
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#include <linux/dma-mapping.h>
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#include <linux/edma.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/spi_bitbang.h>
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#include <linux/slab.h>
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#include <mach/spi.h>
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#include <mach/edma.h>
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#define SPI_NO_RESOURCE ((resource_size_t)-1)
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@ -113,14 +114,6 @@
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#define SPIDEF 0x4c
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#define SPIFMT0 0x50
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/* We have 2 DMA channels per CS, one for RX and one for TX */
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struct davinci_spi_dma {
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int tx_channel;
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int rx_channel;
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int dummy_param_slot;
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enum dma_event_q eventq;
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};
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/* SPI Controller driver's private data. */
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struct davinci_spi {
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struct spi_bitbang bitbang;
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@ -134,11 +127,14 @@ struct davinci_spi {
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const void *tx;
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void *rx;
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#define SPI_TMP_BUFSZ (SMP_CACHE_BYTES + 1)
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u8 rx_tmp_buf[SPI_TMP_BUFSZ];
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int rcount;
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int wcount;
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struct davinci_spi_dma dma;
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struct dma_chan *dma_rx;
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struct dma_chan *dma_tx;
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int dma_rx_chnum;
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int dma_tx_chnum;
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struct davinci_spi_platform_data *pdata;
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void (*get_rx)(u32 rx_data, struct davinci_spi *);
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@ -496,21 +492,23 @@ static int davinci_spi_process_events(struct davinci_spi *dspi)
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return errors;
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}
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static void davinci_spi_dma_callback(unsigned lch, u16 status, void *data)
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static void davinci_spi_dma_rx_callback(void *data)
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{
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struct davinci_spi *dspi = data;
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struct davinci_spi_dma *dma = &dspi->dma;
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struct davinci_spi *dspi = (struct davinci_spi *)data;
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edma_stop(lch);
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if (status == DMA_COMPLETE) {
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if (lch == dma->rx_channel)
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dspi->rcount = 0;
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if (lch == dma->tx_channel)
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dspi->wcount = 0;
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if (!dspi->wcount && !dspi->rcount)
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complete(&dspi->done);
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}
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if ((!dspi->wcount && !dspi->rcount) || (status != DMA_COMPLETE))
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static void davinci_spi_dma_tx_callback(void *data)
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{
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struct davinci_spi *dspi = (struct davinci_spi *)data;
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dspi->wcount = 0;
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if (!dspi->wcount && !dspi->rcount)
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complete(&dspi->done);
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}
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@ -526,20 +524,20 @@ static void davinci_spi_dma_callback(unsigned lch, u16 status, void *data)
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static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
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{
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struct davinci_spi *dspi;
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int data_type, ret;
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int data_type, ret = -ENOMEM;
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u32 tx_data, spidat1;
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u32 errors = 0;
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struct davinci_spi_config *spicfg;
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struct davinci_spi_platform_data *pdata;
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unsigned uninitialized_var(rx_buf_count);
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struct device *sdev;
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void *dummy_buf = NULL;
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struct scatterlist sg_rx, sg_tx;
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dspi = spi_master_get_devdata(spi->master);
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pdata = dspi->pdata;
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spicfg = (struct davinci_spi_config *)spi->controller_data;
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if (!spicfg)
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spicfg = &davinci_spi_default_cfg;
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sdev = dspi->bitbang.master->dev.parent;
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/* convert len to words based on bits_per_word */
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data_type = dspi->bytes_per_word[spi->chip_select];
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@ -567,112 +565,83 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
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spidat1 |= tx_data & 0xFFFF;
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iowrite32(spidat1, dspi->base + SPIDAT1);
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} else {
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struct davinci_spi_dma *dma;
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unsigned long tx_reg, rx_reg;
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struct edmacc_param param;
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void *rx_buf;
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int b, c;
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struct dma_slave_config dma_rx_conf = {
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.direction = DMA_DEV_TO_MEM,
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.src_addr = (unsigned long)dspi->pbase + SPIBUF,
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.src_addr_width = data_type,
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.src_maxburst = 1,
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};
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struct dma_slave_config dma_tx_conf = {
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.direction = DMA_MEM_TO_DEV,
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.dst_addr = (unsigned long)dspi->pbase + SPIDAT1,
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.dst_addr_width = data_type,
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.dst_maxburst = 1,
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};
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struct dma_async_tx_descriptor *rxdesc;
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struct dma_async_tx_descriptor *txdesc;
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void *buf;
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dma = &dspi->dma;
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dummy_buf = kzalloc(t->len, GFP_KERNEL);
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if (!dummy_buf)
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goto err_alloc_dummy_buf;
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tx_reg = (unsigned long)dspi->pbase + SPIDAT1;
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rx_reg = (unsigned long)dspi->pbase + SPIBUF;
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dmaengine_slave_config(dspi->dma_rx, &dma_rx_conf);
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dmaengine_slave_config(dspi->dma_tx, &dma_tx_conf);
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/*
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* Transmit DMA setup
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*
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* If there is transmit data, map the transmit buffer, set it
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* as the source of data and set the source B index to data
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* size. If there is no transmit data, set the transmit register
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* as the source of data, and set the source B index to zero.
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*
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* The destination is always the transmit register itself. And
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* the destination never increments.
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*/
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if (t->tx_buf) {
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t->tx_dma = dma_map_single(&spi->dev, (void *)t->tx_buf,
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t->len, DMA_TO_DEVICE);
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if (dma_mapping_error(&spi->dev, t->tx_dma)) {
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dev_dbg(sdev, "Unable to DMA map %d bytes"
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"TX buffer\n", t->len);
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return -ENOMEM;
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}
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}
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/*
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* If number of words is greater than 65535, then we need
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* to configure a 3 dimension transfer. Use the BCNTRLD
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* feature to allow for transfers that aren't even multiples
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* of 65535 (or any other possible b size) by first transferring
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* the remainder amount then grabbing the next N blocks of
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* 65535 words.
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*/
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c = dspi->wcount / (SZ_64K - 1); /* N 65535 Blocks */
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b = dspi->wcount - c * (SZ_64K - 1); /* Remainder */
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if (b)
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c++;
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sg_init_table(&sg_rx, 1);
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if (!t->rx_buf)
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buf = dummy_buf;
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else
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b = SZ_64K - 1;
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param.opt = TCINTEN | EDMA_TCC(dma->tx_channel);
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param.src = t->tx_buf ? t->tx_dma : tx_reg;
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param.a_b_cnt = b << 16 | data_type;
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param.dst = tx_reg;
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param.src_dst_bidx = t->tx_buf ? data_type : 0;
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param.link_bcntrld = 0xffffffff;
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param.src_dst_cidx = t->tx_buf ? data_type : 0;
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param.ccnt = c;
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edma_write_slot(dma->tx_channel, ¶m);
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edma_link(dma->tx_channel, dma->dummy_param_slot);
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/*
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* Receive DMA setup
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*
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* If there is receive buffer, use it to receive data. If there
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* is none provided, use a temporary receive buffer. Set the
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* destination B index to 0 so effectively only one byte is used
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* in the temporary buffer (address does not increment).
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*
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* The source of receive data is the receive data register. The
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* source address never increments.
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*/
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if (t->rx_buf) {
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rx_buf = t->rx_buf;
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rx_buf_count = t->len;
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} else {
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rx_buf = dspi->rx_tmp_buf;
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rx_buf_count = sizeof(dspi->rx_tmp_buf);
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buf = t->rx_buf;
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t->rx_dma = dma_map_single(&spi->dev, buf,
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t->len, DMA_FROM_DEVICE);
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if (!t->rx_dma) {
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ret = -EFAULT;
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goto err_rx_map;
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}
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sg_dma_address(&sg_rx) = t->rx_dma;
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sg_dma_len(&sg_rx) = t->len;
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t->rx_dma = dma_map_single(&spi->dev, rx_buf, rx_buf_count,
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DMA_FROM_DEVICE);
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if (dma_mapping_error(&spi->dev, t->rx_dma)) {
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dev_dbg(sdev, "Couldn't DMA map a %d bytes RX buffer\n",
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rx_buf_count);
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if (t->tx_buf)
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dma_unmap_single(&spi->dev, t->tx_dma, t->len,
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DMA_TO_DEVICE);
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return -ENOMEM;
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sg_init_table(&sg_tx, 1);
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if (!t->tx_buf)
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buf = dummy_buf;
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else
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buf = (void *)t->tx_buf;
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t->tx_dma = dma_map_single(&spi->dev, buf,
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t->len, DMA_FROM_DEVICE);
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if (!t->tx_dma) {
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ret = -EFAULT;
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goto err_tx_map;
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}
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sg_dma_address(&sg_tx) = t->tx_dma;
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sg_dma_len(&sg_tx) = t->len;
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param.opt = TCINTEN | EDMA_TCC(dma->rx_channel);
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param.src = rx_reg;
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param.a_b_cnt = b << 16 | data_type;
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param.dst = t->rx_dma;
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param.src_dst_bidx = (t->rx_buf ? data_type : 0) << 16;
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param.link_bcntrld = 0xffffffff;
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param.src_dst_cidx = (t->rx_buf ? data_type : 0) << 16;
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param.ccnt = c;
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edma_write_slot(dma->rx_channel, ¶m);
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rxdesc = dmaengine_prep_slave_sg(dspi->dma_rx,
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&sg_rx, 1, DMA_DEV_TO_MEM,
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DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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if (!rxdesc)
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goto err_desc;
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txdesc = dmaengine_prep_slave_sg(dspi->dma_tx,
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&sg_tx, 1, DMA_MEM_TO_DEV,
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DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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if (!txdesc)
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goto err_desc;
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rxdesc->callback = davinci_spi_dma_rx_callback;
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rxdesc->callback_param = (void *)dspi;
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txdesc->callback = davinci_spi_dma_tx_callback;
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txdesc->callback_param = (void *)dspi;
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if (pdata->cshold_bug)
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iowrite16(spidat1 >> 16, dspi->base + SPIDAT1 + 2);
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edma_start(dma->rx_channel);
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edma_start(dma->tx_channel);
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dmaengine_submit(rxdesc);
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dmaengine_submit(txdesc);
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dma_async_issue_pending(dspi->dma_rx);
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dma_async_issue_pending(dspi->dma_tx);
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set_io_bits(dspi->base + SPIINT, SPIINT_DMA_REQ_EN);
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}
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@ -690,15 +659,13 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
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clear_io_bits(dspi->base + SPIINT, SPIINT_MASKALL);
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if (spicfg->io_type == SPI_IO_TYPE_DMA) {
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if (t->tx_buf)
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dma_unmap_single(&spi->dev, t->tx_dma, t->len,
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DMA_TO_DEVICE);
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dma_unmap_single(&spi->dev, t->rx_dma, rx_buf_count,
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DMA_FROM_DEVICE);
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clear_io_bits(dspi->base + SPIINT, SPIINT_DMA_REQ_EN);
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dma_unmap_single(&spi->dev, t->rx_dma,
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t->len, DMA_FROM_DEVICE);
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dma_unmap_single(&spi->dev, t->tx_dma,
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t->len, DMA_TO_DEVICE);
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kfree(dummy_buf);
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}
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clear_io_bits(dspi->base + SPIGCR1, SPIGCR1_SPIENA_MASK);
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@ -716,11 +683,20 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
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}
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if (dspi->rcount != 0 || dspi->wcount != 0) {
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dev_err(sdev, "SPI data transfer error\n");
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dev_err(&spi->dev, "SPI data transfer error\n");
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return -EIO;
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}
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return t->len;
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err_desc:
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dma_unmap_single(&spi->dev, t->tx_dma, t->len, DMA_TO_DEVICE);
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err_tx_map:
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dma_unmap_single(&spi->dev, t->rx_dma, t->len, DMA_FROM_DEVICE);
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err_rx_map:
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kfree(dummy_buf);
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err_alloc_dummy_buf:
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return ret;
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}
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/**
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@ -751,39 +727,33 @@ static irqreturn_t davinci_spi_irq(s32 irq, void *data)
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static int davinci_spi_request_dma(struct davinci_spi *dspi)
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{
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dma_cap_mask_t mask;
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struct device *sdev = dspi->bitbang.master->dev.parent;
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int r;
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struct davinci_spi_dma *dma = &dspi->dma;
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r = edma_alloc_channel(dma->rx_channel, davinci_spi_dma_callback, dspi,
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dma->eventq);
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if (r < 0) {
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pr_err("Unable to request DMA channel for SPI RX\n");
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r = -EAGAIN;
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dma_cap_zero(mask);
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dma_cap_set(DMA_SLAVE, mask);
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dspi->dma_rx = dma_request_channel(mask, edma_filter_fn,
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&dspi->dma_rx_chnum);
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if (!dspi->dma_rx) {
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dev_err(sdev, "request RX DMA channel failed\n");
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r = -ENODEV;
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goto rx_dma_failed;
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}
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r = edma_alloc_channel(dma->tx_channel, davinci_spi_dma_callback, dspi,
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dma->eventq);
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if (r < 0) {
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pr_err("Unable to request DMA channel for SPI TX\n");
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r = -EAGAIN;
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dspi->dma_tx = dma_request_channel(mask, edma_filter_fn,
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&dspi->dma_tx_chnum);
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if (!dspi->dma_tx) {
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dev_err(sdev, "request TX DMA channel failed\n");
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r = -ENODEV;
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goto tx_dma_failed;
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}
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r = edma_alloc_slot(EDMA_CTLR(dma->tx_channel), EDMA_SLOT_ANY);
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if (r < 0) {
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pr_err("Unable to request SPI TX DMA param slot\n");
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r = -EAGAIN;
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goto param_failed;
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}
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dma->dummy_param_slot = r;
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edma_link(dma->dummy_param_slot, dma->dummy_param_slot);
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return 0;
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param_failed:
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edma_free_channel(dma->tx_channel);
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tx_dma_failed:
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edma_free_channel(dma->rx_channel);
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dma_release_channel(dspi->dma_rx);
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rx_dma_failed:
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return r;
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}
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@ -898,9 +868,8 @@ static int __devinit davinci_spi_probe(struct platform_device *pdev)
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dspi->bitbang.txrx_bufs = davinci_spi_bufs;
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if (dma_rx_chan != SPI_NO_RESOURCE &&
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dma_tx_chan != SPI_NO_RESOURCE) {
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dspi->dma.rx_channel = dma_rx_chan;
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dspi->dma.tx_channel = dma_tx_chan;
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dspi->dma.eventq = pdata->dma_event_q;
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dspi->dma_rx_chnum = dma_rx_chan;
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dspi->dma_tx_chnum = dma_tx_chan;
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ret = davinci_spi_request_dma(dspi);
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if (ret)
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@ -955,9 +924,8 @@ static int __devinit davinci_spi_probe(struct platform_device *pdev)
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return ret;
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free_dma:
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edma_free_channel(dspi->dma.tx_channel);
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edma_free_channel(dspi->dma.rx_channel);
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edma_free_slot(dspi->dma.dummy_param_slot);
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dma_release_channel(dspi->dma_rx);
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dma_release_channel(dspi->dma_tx);
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free_clk:
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clk_disable(dspi->clk);
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clk_put(dspi->clk);
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